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LM1894N データシート(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部品番号 LM1894N
部品情報  Dynamic Noise Reduction System DNR
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メーカー  NSC [National Semiconductor (TI)]
ホームページ  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM1894N データシート(HTML) 2 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
20V
Input Voltage Range, V
pk
V
S/2
Operating Temperature (Note 2)
0˚C to +70˚C
Storage Temperature
−65˚C to +150˚C
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
260˚C
Small Outline Package
Vapor Phase (60 seconds)
215˚C
Infrared (15 seconds)
220˚C
See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage
to the device may occur. Operating Ratings indicate conditions for which the
device is functional, but do not guarantee specific performance limits.
Electrical Characteristics
V
S = 8V, TA = 25˚C, VIN = 300 mV at 1 kHz, circuit shown in Figure 1 unless otherwise specified
Parameter
Conditions
Min
Typ
Max
Units
Operating Supply Range
4.5
8
18
V
Supply Current
V
S = 8V
17
30
mA
MAIN SIGNAL PATH
Voltage Gain
DC Ground Pin 9, (Note 3)
−0.9
−1
−1.1
V/V
DC Output Voltage
3.7
4.0
4.3
V
Channel Balance
DC Ground Pin 9
−1.0
1.0
dB
Minimum Balance
AC Ground Pin 9 with 0.1 µF
675
965
1400
Hz
Capacitor, (Note 3)
Maximum Bandwidth
DC Ground Pin 9, (Note 3)
27
34
46
kHz
Effective Noise Reduction
CCIR/ARM Weighted, (Note 4)
−10
−14
dB
Total Harmonic Distortion
DC Ground Pin 9
0.05
0.1
%
Input Headroom
Maximum V
IN for 3% THD
1.0
Vrms
AC Ground Pin 9
Output Headroom
Maximum V
OUT for 3% THD
V
S − 1.5
Vp-p
DC Ground Pin 9
Signal to Noise
BW = 20 Hz–20 kHz, re 300 mV
AC Ground Pin 9
79
dB
DC Ground Pin 9
77
dB
CCIR/ARM Weighted re 300 mV
(Note 5)
AC Ground Pin 9
82
88
dB
DC Ground Pin 9
70
76
dB
CCIR Peak, re 300 mV, (Note 6)
AC Ground Pin 9
77
dB
DC Ground Pin 9
64
dB
Input Impedance
Pin 2 and Pin 13
14
20
26
k
Channel Separation
DC Ground Pin 9
−50
−70
dB
Power Supply Rejection
C14 = 100 µF,
V
RIPPLE = 500 mVrms,
−40
−56
dB
f = 1 kHz
Output DC Shift
Reference DVM to Pin 14 and
Measuree Output DC Shift from
4.0
20
mV
Minimum to Maximum Band-
width, (Note 7).
CONTROL SIGNAL PATH
Summing Amplifier Voltage Gain
Both Channels Driven
0.9
1
1.1
V/V
Gain Amplifier Input Impedance
Voltage Gain
Pin 6
243039
k
Pin 6 to Pin 8
21.5
24
26.5
V/V
www.national.com
2


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