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BU2099FV-E2 データシート(PDF) 7 Page - Rohm

部品番号 BU2099FV-E2
部品情報  4-input Serial-in / Parallel-out Drivers
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メーカー  ROHM [Rohm]
ホームページ  http://www.rohm.com
Logo ROHM - Rohm

BU2099FV-E2 データシート(HTML) 7 Page - Rohm

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BU2099FV
TSZ02201-0RHR1GZ00140-1-2
© 2013 ROHM Co., Ltd. All rights reserved.
18.Sep.2015 Rev.002
www.rohm.com
TSZ22111・15・001
Timing Chart
1.
After the power is turned on and the voltage is stabilized, LCK should be activates, after clocking 12 data bits
into the DATA terminal.
2.
Qx parallel output data of the shift register is set after the 12
th clock by the LCK.
3.
Since the LCK is a label latch, data is retained in the “L” section and renewed in the “H” section of the LCK.
4.
Data retained in the internal latch circuit is output when the OE is in the “L” section.
5.
The final stage data of the shift register is output to the SO by synchronizing with the rise time of the CLOCK.
Truth Table]
Input
Function
CLOCK
DATA
LCK
OE
×
×
×
H
All the output data output “H” with pull-up.
×
×
×
L
The Q0~Q11 output can be enable and output the data of storage register.
L
×
×
Store “L” in the first stage data of shift register, the previous stage data in the
others. (The conditions of storage register and output have no change.)
H
×
×
Store “H” in the first stage data of shift register, the previous stage data in
the others. (The conditions of storage register and output have no change.)
×
×
×
The data of shift register has no change.
SO outputs the final stage data of shift register with synchronized falling
edge of CLOCK, not controlled by OE.
×
×
×
The data of shift register is transferred to the storage register.
×
×
×
The data of storage register has no change.
(Note 2)The Q0~Q11 output have a Nch open drain FET . The FET is ON when data from shift register is “L”, and the FET is OFF when data is “H”.
Figure 6 . Timing Chart
OE
Qx
Previous DATA
DATA
SO
Previous
DATA11
Previous
DATA10
DATA12
DATA11
“H”
CLOCK
DATA
DATA12 DATA11
DATA10
DATA2
DATA1
LCK


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