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NBSG72AMN データシート(PDF) 9 Page - ON Semiconductor |
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NBSG72AMN データシート(HTML) 9 Page - ON Semiconductor |
9 / 16 page NBSG72A http://onsemi.com 9 Table 10. AC CHARACTERISTICS (VCC = 0 V; VEE = −3.465 V to −2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V) (Note 24) Symbol Characteristic −40 °C 25 °C 85 °C Unit Min Typ Max Min Typ Max Min Typ Max VOUTPP Output Voltage Amplitude fin < 5 GHz fin v 7 GHz 400 200 590 250 450 180 590 250 440 130 590 250 mV tPLH Propagation Delay to Output Differential D0, D1 → Q0, Q1 SELA, SELB → Q0, Q1 170 190 205 265 255 350 170 190 205 265 255 350 170 190 210 265 260 350 ps tPHL Propagation Delay to Output Differential D0, D1 → Q0, Q1 SELA, SELB → Q0, Q1 170 150 205 215 255 270 170 150 205 215 255 270 170 150 210 215 260 270 ps tSKEW Duty Cycle Skew (Note 25) Within-Device Skew Device-to-Device Skew 5.0 5.0 15 25 25 50 5.0 5.0 15 25 25 50 5.0 5.0 15 25 25 50 ps tJITTER RMS Random Clock Jitter (Note 26) v 1 GHz OLS = VCC v 5 GHz OLS = VCC v 6.5 GHz OLS = VCC v 1 GHz OLS = VCC − 400 mV v 5 GHz OLS = VCC − 400 mV v 6.5 GHz OLS = VCC − 400 mV v 1 GHz OLS = VCC − 800 mV v 5 GHz OLS = VCC − 800 mV v 6.5 GHz OLS = VCC − 800 mV v 1 GHz OLS = VEE v 5 GHz OLS = VEE v 6.5 GHz OLS = VEE Peak-to-Peak Data Dependent Jitter (Note 27) fin v 7 Gb/s 0.16 0.14 0.21 0.23 0.18 0.2 0.17 0.14 0.2 0.18 0.16 0.18 12 0.3 0.4 0.5 0.4 0.5 0.5 0.3 0.4 0.5 0.3 0.6 0.5 18 0.17 0.16 0.31 0.23 0.19 0.25 0.18 0.16 0.27 0.19 0.17 0.24 12 0.3 0.4 0.7 0.4 0.5 0.6 0.3 0.3 0.7 0.3 0.4 0.6 18 0.18 0.19 0.44 0.25 0.23 0.32 0.19 0.2 0.38 0.2 0.2 0.34 12 0.4 0.4 0.9 0.4 0.5 0.7 0.3 0.3 0.9 0.3 0.4 0.8 18 ps VINPP Input Voltage Swing/Sensitivity (Differential Configuration) (Note 28) 75 2600 75 2600 75 2600 mV tr tf Output Rise/Fall Times (Q0, Q1) (20% − 80%) tr @ 1 GHz tf 40 30 55 45 70 55 40 30 55 45 70 55 40 30 55 45 70 55 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 24. Measured using a 75 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. OLS = FLOAT. Input edge rates 40 ps (20% − 80%). 25. tSKEW = |tPLH − tPHL| for a nominal 50% differential clock input waveform. 26. Additive RMS jitter with 50% Duty Cycle clock signal. 27. Additive Peak-to-Peak data dependent jitter with NRZ PRBS 231−1 data at 7 Gb/s. 28. Input Voltage Swing is a single-ended measurement operating in differential mode. VINPP (max) cannot exceed VCC − VEE. |
同様の部品番号 - NBSG72AMN_14 |
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同様の説明 - NBSG72AMN_14 |
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