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NBSG53AMNR2G データシート(PDF) 10 Page - ON Semiconductor |
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NBSG53AMNR2G データシート(HTML) 10 Page - ON Semiconductor |
10 / 17 page NBSG53A http://onsemi.com 10 Figure 3. Output Voltage Amplitude (VOUTPP) / RMS Jitter vs. Input Frequency (fin) for DFF Mode (VCC − VEE = 3.3 V @ 255C; Repetitive 1010 Input Data Pattern) RMS JITTER INPUT FREQUENCY (GHz) 0 100 200 300 400 500 600 700 800 900 1 234 56 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8 9 OLS = VCC 0 OLS = VCC − 0.4 V *OLS = VEE OLS = VCC − 0.8 V, OLS = FLOAT INPUT FREQUENCY (GHz) 0 100 200 300 400 500 600 700 800 900 123 4 56789 10 11 12 OLS = VCC 0 OLS = VCC − 0.4 V *OLS = VEE OLS = VCC − 0.8 V, OLS = FLOAT Figure 4. Output Voltage Amplitude (VOUTPP) / RMS Jitter vs. Input Frequency (fin) for DIV/2 Mode (VCC − VEE = 3.3 V @ 255C) *When an output level of 400 mV is desired and VCC − VEE > 3.0 V, a 2 kW resistor should be connected from OLS to VEE. |
同様の部品番号 - NBSG53AMNR2G |
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同様の説明 - NBSG53AMNR2G |
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