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MB85RC16VPNF-G データシート(PDF) 10 Page - Fujitsu Component Limited.

部品番号 MB85RC16VPNF-G
部品情報  16 K (2 K 횞 8) Bit I2C
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メーカー  FUJITSU [Fujitsu Component Limited.]
ホームページ  http://edevice.fujitsu.com/fmd/en/index.html
Logo FUJITSU - Fujitsu Component Limited.

MB85RC16VPNF-G データシート(HTML) 10 Page - Fujitsu Component Limited.

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MB85RC16V
10
DS501-00010-6v0-E
• Sequential Read
Data can be received continuously following the Device address word (R/W “1” input) after specifying the
address in the same way as for Random Read. If the read reaches the end of address, the read address
automatically rolls over to the first memory address (000H) and keeps reading.
■ SOFTWARE RESET SEQUENCE OR COMMAND RETRY
In case the malfunction has occurred after power on, the master side stopped the I2C communication during
processing, or unexpected malfunction has occurred, execute the following (1) software recovery sequence
just before each command, or (2) retry command just after failure of each command.
(1) Software Reset Sequence
Since the slave side may be outputting “L” level, do not force to drive “H” level, when the master side drives
the SDA port. This is for preventing a bus conflict. The additional hardware is not necessary for this software
reset sequence.
(2) Command Retry
Command retry is useful to recover from failure response during I2C communication.
Stop Condition
ACK (SDA is the "L" level)
A
P
NACK (SDA is the "H" level)
N
AA
A
N P
Read
Data 8bits
Read
Data 8bits
Read
Data
...
...
Access from master
Access from slave
SCL
SDA
9 set of “Start Conditions and one “1” data”
Send “Start Condition and one data “1”” .
Repeat these 9 times just before Write or Read command.
Hi-Z state by pull up Resistor


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