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74FCT273DMX データシート(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部品番号 74FCT273DMX
部品情報  Octal D Flip-Flop
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メーカー  NSC [National Semiconductor (TI)]
ホームページ  http://www.national.com
Logo NSC - National Semiconductor (TI)

74FCT273DMX データシート(HTML) 1 Page - National Semiconductor (TI)

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TLF10146
March 1993
54FCT74FCT273
Octal D Flip-Flop
General Description
The ’FCT273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs The common buffered
Clock (CP) and Master Reset (MR) input load and reset
(clear) all flip-flops simultaneously
The register is fully edge-triggered The state of each D in-
put one setup time before the LOW-to-HIGH clock tran-
sition is transferred to the corresponding flip-flop’s Q out-
put
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input The
device is useful for applications where the true output only is
required and the Clock and Master Reset are common to all
storage elements
Features
Y
ICC reduced to 400 mA
Y
Ideal buffer for MOS microprocessor or memory
Y
Eight edge-triggered D flip-flops
Y
Buffered common clock
Y
Buffered asynchronous master reset
Y
TTL input and output level compatible
Y
TTL levels accept CMOS levels
Y
IOL e 48 mA (Com) 32 mA (Mil)
Y
NSC 5474FCT273 is pin and functionally equivalent to
IDT 5474FCT273
Y
Military
product
compliant
to
MIL-STD-883
and
Standard Military Drawing
5962-87656
Logic Symbols
Connection Diagrams
TLF10146 – 1
IEEEIEC
TLF10146 – 2
Pin Assignment
for DIP Flatpak and SOIC
TLF10146 – 3
Pin Names
Description
D0–D7
Data Inputs
MR
Master Reset
CP
Clock Pulse Input
Q0–Q7
Data Outputs
Pin Assignment
for LCC
TLF10146 – 4
FACTTM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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