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AK2401 データシート(PDF) 42 Page - Asahi Kasei Microsystems

部品番号 AK2401
部品情報  Direct Conversion Transceiver
Download  103 Pages
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メーカー  AKM [Asahi Kasei Microsystems]
ホームページ  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK2401 データシート(HTML) 42 Page - Asahi Kasei Microsystems

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[AK2401]
017003093-E-00
2017/3
42
13.7.4.
Fast Lock Function
Fast lock function of the AK2401 is enabled by setting FASTEN bit =
“1” <Address 0x0C>. The timer of
fast lock operation will start when accessing to the <Address 0x08> for changing the frequency.
The loop filter switch is on for the timer period set by FAST_TIME[12:0] bits <Address 0x0D, 0x0E> and
the charge pump current for fast lock function set by CPFAST[4:0] bits <Address 0x0B> is supplied. After
the timer period is finished the loop filter switch is turned off and the normal charge pump current set by
CPFINE[4:0] bits <Address 0x0A> is enabled. The timing chart of the fast lock function is shown Figure
25. The following formula is used to calculate the period of fast lock function.
Timer Period = Phase Frequency Detector Frequency Cycle x FAST_TIME[12:0] bits
The charge pump current is variable in 32 steps for both normal and fast lock operations. The charge
pump current is determined by the resistance connected to the BIAS2 pin, CPFINE[4:0] bits <Address
0x0A> setting and CPFAST[4:0] bits <Address 0x0B> setting for normal and fast lock operations,
respectively. The followings show the relationships between resistance, register settings and current.
Minimum Current of Charge Pump (ICP_MIN) = 2.025 / resistor value [kΩ] of the BIAS2 pin
Charge Pump Current [
μA] = I
CP_MIN × (CPFINE[4:0] bit or CPFAST[4:0] bit + 1)
The external resistor of the BIAS pin should be selected in the range of 22 ~ 33 k
Ω. Refer to the CP in
“15.5 <0x0A~0x0B>CP” for details of the setting.
Fast Lockup Mode
CPFAST
ON
Normal Operation
Normal Operation
CPFINE
OFF
CPFINE
OFF
Timer Period
Normal Mode
Charge Pump
Loop Filter
ON/OFF Switch
Charge Pump current is changed on the
timing
writing
to
<Address0x08>
if
FSTEN bit is set to
“1” <Address 0x0C>.
Figure 25. Fast Lock Function Sequence


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