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FM24CL64 データシート(PDF) 11 Page - List of Unclassifed Manufacturers |
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FM24CL64 データシート(HTML) 11 Page - List of Unclassifed Manufacturers |
11 / 13 page FM24CL64 Rev 2.0 July 2003 Page 11 of 13 Diagram Notes All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional relationships are illustrated in the relevant data sheet sections. These diagrams illustrate the timing parameters only. Read Bus Timing t SU:SDA Start t R ` t F Stop Start t BUF t HIGH 1/fSCL t LOW t SP t SP Acknowledge t HD:DAT t SU:D AT t AA t DH SCL SDA Write Bus Timing t SU:STO Start Stop Start Acknowledge t AA t HD:DAT t HD:STA t SU:DAT SCL SDA Data Retention (VDD = 2.7V to 3.65V unless otherwise specified) Parameter Min Units Notes Data Retention 10 Years 1 Notes 1. Endurance is the guaranteed number of read- or write-cycles per address that can be performed while maintaining the specified data retention. It is unlikely to reach this limit for most applications. |
同様の部品番号 - FM24CL64 |
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同様の説明 - FM24CL64 |
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