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FM24CL64-S データシート(PDF) 7 Page - List of Unclassifed Manufacturers

部品番号 FM24CL64-S
部品情報  64Kb 2.7V-3.6V FRAM Serial Memory
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FM24CL64
Rev 2.0
July 2003
Page 7 of 13
that are loaded into the internal address latch. After
the FM24CL64 acknowledges the address, the bus
master issues a start condition. This simultaneously
aborts the write operation and allows the read
command to be issued with the device address LSB
set to a 1. The operation is now a current address
read.
S
A
Slave Address
1
Data Byte
1
P
By Master
By FM24CL64
Start
Address
Stop
Acknowledge
No
Acknowledge
Data
Figure 7. Current Address Read
S
A
Slave Address
1
Data Byte
1
P
By Master
By FM24CL64
Start
Address
Stop
Acknowledge
No
Acknowledge
Data
Data Byte
A
Acknowledge
Figure 8. Sequential Read
S
A
Slave Address
1
Data Byte
1
P
By Master
By FM24CL64
Start
Address
Stop
No
Acknowledge
Data
S
A
Slave Address
0
Address MSB
A
Start
Address
Acknowledge
Address LSB
A
Figure 9. Selective (Random) Read
Applications
Clearly the strength of higher write endurance and
faster writes make FRAM superior to EEPROM in all
but
one-time
programmable
applications.
The
advantage
is
most
obvious in data
collection
environments where writes are frequent and data
must be nonvolatile, but the benefits combine in other
ways. A short list of ideas is provided here.
1.
Data collection. In applications where data is
collected and saved, FRAM provides a superior
alternative to other solutions. It is more cost effective
than battery backup for SRAM and provides better
write attributes than EEPROM.
2.
Configuration. Any nonvolatile memory can
retain a configuration. However, if the configuration
changes and power failure is a possibility, the higher
write endurance of FRAM allows changes to be
recorded without restriction. Any time the system
state is altered, the change can be written. This avoids
writing to memory on power down when the
available time is short and power scarce.
3.
High noise environments. Writing to EEPROM
in a noisy environment can be challenging. When
severe noise or power fluctuations are present, the
long write time of EEPROM creates a window of
vulnerability
during
which
the
write
can
be
corrupted. The fast write of FRAM is complete
within a microsecond. This time is typically too short
for noise or power fluctuation to disturb it.
4.
Time to market. In a complex system, multiple
software routines may need to access the nonvolatile
memory.
In
this
environment
the
time
delay
associated with programming EEPROM adds undue


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