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FM209 データシート(PDF) 6 Page - List of Unclassifed Manufacturers

部品番号 FM209
部品情報  9600/14400 BPS MONOFAX MODEM FAMILY
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メーカー  ETC [List of Unclassifed Manufacturers]
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FM209 データシート(HTML) 6 Page - List of Unclassifed Manufacturers

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MD205
Table 3. Turn-On Sequence Times
    
  
 
  
 
 



  


  


  


     
 

     


     


     


    
≤
≤
Table 4. Turn-Off Sequence Times
  
 



 






  



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Notes:
1.
In parallel data mode, the turn-off sequence may be
extended by 8 bit times.
2.
In HDLC mode, the turn-off sequence may be extended by
more than 8 bit times.
Caller ID Reception
Caller ID reception (CID) allows Customer Premises
Equipment (CPE) to receive a calling party’s directory
number which includes the date and time of the call.
For Type I Caller ID this information is contained in the
first 4-second silent interval in the ring cycle. For Type
II Caller ID support an ACK signal is sent by the CPE
in response to a CAS tone, after which the calling
party information from the Stored Program Control
Switching System (SPCS) can be received by the
CPE.
Tone Generation
The modem can generate voice-band single or dual
tones from 0 Hz to 4800 Hz with a resolution of 0.15
Hz and an accuracy of 0.01%. Tones over 3000 Hz
are attenuated. Dual tone generation allows the
modem to operate as a programmable DTMF dialer.
Tone Detectors
All three tone detectors operate in all receive modes.
The tone detectors can also operate as one 12th order
filter.
The filter coefficients of each filter are host
programmable in RAM. The output of the tone detector
filter goes to an energy detector.
Hardware Interface
The Fax, Digital Telephone Answering Machine
(DTAM), and Speakerphone hardware interface
signals are shown in Figure 1, Figure 2, and Figure 3.
Any point that is active when exhibiting the relatively
more negative voltage of a two-voltage system (0 VDC
for TTL or -12 VDC for EIA/TIA-232-E) is called active
low and is represented by a small circle at the signal
point. Active low signals are indicated by a pound sign
(#), (RESET#).
Edge-triggered clocks are indicated by a small triangle
(DCLK).
A small half circle denotes open-collector (open-
source or open-drain) outputs (signal IRQ#).
A clock intended to activate logic on its rising edge
(low-to-high transition) is called active high, while a
clock intended to activate logic on its falling edge
(high-to-low transition) is called active low. When clock
input is associated with a small circle, the input
activates on a falling edge. If no circle is shown, the
input activates on a rising edge.
The pin assignments for the 128-pin TQFP are shown
in Figure 4.
General Specifications
The modem power and environmental requirements
are listed in Table 5 and Table 6, respectively.
Table 5. Current and Power Requirements
Mode
Option
Current (Typ.)
@25
°C
3.3V ± 5%.
DVAA
2.5 ma
V
DD
Basic
50 ma
V
DD
- V
72 ma
V
DD
- VS
80 ma
5V ± 5% V
GG
5.5 ma
Basic
.25 ma
- V
.30 ma
- VS
.30 ma
Note: Input Ripple
≤0.1 Vpeak-peak. The
amplitude of any frequency between 20
kHz and 150 kHz must be less than 500
µVpeak.
Table 6. Environmental Requirements
Parameter
Specification
Temperature
Operating
0
°C to +70°C (32°F to 158°F)
Storage
-55
°C to +125°C (-67°F to 257°F)
Relative Humidity
Up to 90% non-condensing, or a wet bulb
temperature up to 35
°C, whichever is less.


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