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HT37B90 データシート(PDF) 66 Page - Holtek Semiconductor Inc |
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HT37B90 データシート(HTML) 66 Page - Holtek Semiconductor Inc |
66 / 80 page HT37B90/HT37B70/HT37B50/HT37B30 Rev.1.00 66 June22,2017 BitOperations The ability to provide single bit operations on Data Mem- ory is an extremely flexible feature of all Holtek microcontrollers. This feature is especially useful for output port bit programming where individual bits or port pins can be directly set high or low using either the ²SET [m].i ² or ²CLR [m].i² instructions respectively. The fea- ture removes the need for programmers to first read the 8-bit output port, manipulate the input data to ensure that other bits are not changed and then output the port with the correct new data. This read-modify-write pro- cess is taken care of automatically when these bit oper- ationinstructionsareused. TableReadOperations Data storage is normally implemented by using regis- ters. However, when working with large amounts of fixed data, the volume involved often makes it inconve- nient to store the fixed data in the Data Memory. To over- come this problem, Holtek microcontrollers allow an area of Program Memory to be setup as a table where data can be directly stored. A set of easy to use instruc- tions provides the means by which this fixed data can be referencedandretrievedfromtheProgramMemory. OtherOperations In addition to the above functional instructions, a range of other instructions also exist such as the ²HALT² in- struction for Power-down operations and instructions to control the operation of the Watchdog Timer for reliable program operations under extreme electric or electro- magnetic environments. For their relevant operations, refertothefunctionalrelatedsections. InstructionSetSummary The following table depicts a summary of the instruction set categorised according to function and can be con- sulted as a basic instruction reference using the follow- inglistedconventions. Tableconventions: x:Bitsimmediatedata m:DataMemoryaddress A:Accumulator i:0~7numberofbits addr:Programmemoryaddress Mnemonic Description Cycles FlagAffected Arithmetic ADDA,[m] ADDM A,[m] ADDA,x ADCA,[m] ADCM A,[m] SUBA,x SUBA,[m] SUBM A,[m] SBC A,[m] SBCM A,[m] DAA [m] AddDataMemoryto ACC Add ACC toDataMemory Addimmediatedatato ACC AddDataMemoryto ACC withCarry Add ACC toDatamemorywithCarry Subtractimmediatedatafromthe ACC SubtractDataMemoryfrom ACC SubtractDataMemoryfrom ACC withresultinDataMemory SubtractDataMemoryfrom ACC withCarry SubtractDataMemoryfrom ACC withCarry,resultinDataMemory Decimaladjust ACC forAdditionwithresultinDataMemory 1 1 Note 1 1 1 Note 1 1 1 Note 1 1 Note 1 Note Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV Z,C,AC,OV C LogicOperation ANDA,[m] ORA,[m] XORA,[m] ANDM A,[m] ORM A,[m] XORM A,[m] ANDA,x ORA,x XORA,x CPL [m] CPLA [m] LogicalANDDataMemoryto ACC LogicalORDataMemoryto ACC LogicalXORDataMemoryto ACC LogicalAND ACC toDataMemory LogicalOR ACC toDataMemory LogicalXOR ACC toDataMemory LogicalANDimmediateDatato ACC LogicalORimmediateDatato ACC LogicalXORimmediateDatato ACC ComplementDataMemory ComplementDataMemorywithresultin ACC 1 1 1 1 Note 1 Note 1 Note 1 1 1 1 Note 1 Z Z Z Z Z Z Z Z Z Z Z Increment&Decrement INCA[m] INC[m] DECA [m] DEC[m] IncrementDataMemorywithresultin ACC IncrementDataMemory DecrementDataMemorywithresultin ACC DecrementDataMemory 1 1 Note 1 1 Note Z Z Z Z |
同様の部品番号 - HT37B90 |
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