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RT9737 データシート(PDF) 6 Page - Richtek Technology Corporation

部品番号 RT9737
部品情報  5V Capable Low-Voltage DPDT Analog Switch
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メーカー  RICHTEK [Richtek Technology Corporation]
ホームページ  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT9737 データシート(HTML) 6 Page - Richtek Technology Corporation

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RT9737
Copyright © 2014 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
www.richtek.com
DS9737-00
February
2014
6
Application Information
RT9737 is a 5V high quality low-voltage double-pole
double-throw (DPDT) analog switch. RT9737 supply
voltage is designed to operate from 2.5 to 5.5V. Supply
voltage can be smaller than input voltage while keeping
5V input range. With 70m
 turn-on resistance, power-
loss and signal distortion can be minimized. RT9737 is
ideal for switching audio signal from outputs of audio
amplifiers. The break-before-make feature prevents
signal distortion during the transferring of a signal from
one path to another for audio applications.
Analog Input
RT9737 internal topology design for input and output
voltage level can greater than supply voltage.
Low turn-on resistance and excellent channel to
channel matching are ideal for audio applications.
Switch Logic Control
RT9737 can use SEL pin to control internal switches
position for another audio source application. SEL pin
input current is very low.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
The maximum power dissipation can be calculated by
the following formula :
PD(MAX) = (TJ(MAX)  TA) / JA
where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and JA is the junction to
ambient thermal resistance.
For recommended operating condition specifications,
the maximum junction temperature is 125
C. The
junction to ambient thermal resistance,
JA, is layout
dependent.
For
WL-CSP-9B
1.24x1.24
(BSC)
packages, the thermal resistance,
JA, is 78.1C/W on
a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25C can be
calculated by the following formula :
PD(MAX) = (125C  25C) / (78.1C/W) = 1.28W for
WL-CSP-9B 1.24x1.24 (BSC) package
The maximum power dissipation depends on the
operating ambient temperature for fixed TJ(MAX) and
thermal resistance,
JA. The derating curve in Figure 1
allows the designer to see the effect of rising ambient
temperature on the maximum power dissipation.
Figure 1. Derating Curve of Maximum Power
Dissipation
INA1
INA2
INB1
OUTB
INB2
OUTA
GND
A1
A2
A3
B3
B1
C1
C2
C3
B2
GND
Place the capacitor CVDDEN as
close as possible to the VDDEN.
Use blind hole to
connect other strong
ground plane.
CVDDEN
Figure 2. PCB Layout Guide
Four-Layer PCB


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