AD73322_17 datasheet(32/44 Pages) AD

部品番号	AD73322

部品情報	Low Cost, Low Power CMOS General-Purpose Dual Analog Front

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AD73322

–31–

REV. B

The AD73322’s ADC inputs are biased about the internal refer-

ence level (REFCAP level), therefore it may be necessary to

bias external signals to this level using the buffered REFOUT

level as the reference. This is applicable in either dc- or ac-

coupled configurations. In the case of dc coupling, the signal

(biased to REFOUT) may be applied directly to the inputs

(using amplifier bypass), as shown in Figure 28, or it may be

conditioned in an external op amp where it can also be biased

to the reference level using the buffered REFOUT signal as

shown in Figure 29 or it is possible to connect inputs directly

to the AD73322’s input op amps as shown in Figure 30.

VFBN1

GAIN

1

VREF

VINN1

VINP1

VFBP1

VOUTP1

VOUTN1

REFOUT

REFERENCE

AD73322

VREF

50k

100pF

50k

100pF

50k

REFCAP

0.1 F

0/38dB

PGA

+6/–15dB

PGA

CONTINUOUS

TIME

LOW-PASS

FILTER

Figure 30. Analog Input (DC-Coupled) Using Internal

Amplifiers

In the case of ac coupling, a capacitor is used to couple the

signal to the input of the ADC. The ADC input must be biased

to the internal reference (REFCAP) level which is done by

connecting the input to the REFOUT pin through a 10 k

Ω

resistor as shown in Figure 31.

VFBN1

GAIN

1

VREF

VINN1

VINP1

VFBP1

VOUTP1

VOUTN1

REFOUT

REFERENCE

AD73322

VREF

100

0.1 F

REFCAP

0.1 F

0/38dB

PGA

0.047

F

0.047

F

10k

0.1 F

10k

+6/–15dB

PGA

CONTINUOUS

TIME

LOW-PASS

FILTER

Figure 31. Analog Input (AC-Coupled) Differential

If the ADC is being connected in single-ended mode, the

AD73322 should be programmed for single-ended mode using

the SEEN and INV bits of CRF and the inputs connected as

shown in Figure 32. When operated in single-ended input

mode, the AD73322 can multiplex one of the two inputs to the

ADC input.

VFBN1

GAIN

1

VREF

VINN1

VINP1

VFBP1

VOUTP1

VOUTN1

REFOUT

REFERENCE

0/38dB

PGA

AD73322

VREF

0.047

F

100

10k

0.1 F

REFCAP

0.1 F

+6/–15dB

PGA

CONTINUOUS

TIME

LOW-PASS

FILTER

Figure 32. Analog Input (AC-Coupled) Single-Ended

If best performance is required from a single-ended source, it

is possible to configure the AD73322’s input amplifiers as a

single-ended to differential converter as shown in Figure 33.

VFBN1

GAIN

1

VREF

VINN1

VINP1

VFBP1

VOUTP1

VOUTN1

REFOUT

REFERENCE

0/38dB

PGA

AD73322

50k

100pF

50k

100pF

50k

REFCAP

0.1 F

VREF

+6/–15dB

PGA

CONTINUOUS

TIME

LOW-PASS

FILTER

Figure 33. Single-Ended to Differential Conversion On

Analog Input

同様の部品番号 - AD73322_17

メーカー	部品番号	データシート	部品情報
Analog Devices	AD73322	389Kb / 43P	Low Cost, Low Power CMOS General-Purpose Dual Analog Front End REV. B

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同様の説明 - AD73322_17

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AD73322 データシート(PDF) 32 Page - Analog Devices

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同様の部品番号 - AD73322_17

同様の説明 - AD73322_17

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