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MT9M034 データシート(PDF) 18 Page - ON Semiconductor

部品番号 MT9M034
部品情報  1/3-Inch CMOS Digital Image Sensor
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
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MT9M034 データシート(HTML) 18 Page - ON Semiconductor

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Spread−Spectrum Clocking
To facilitate improved EMI performance, the external
clock input allows for spread spectrum sources, with no
impact on image quality. Limits of the spread spectrum input
clock are:
5% maximum clock modulation
35 KHz maximum modulation frequency
Accepts triangle wave modulation, as well as sine or
modified triangle modulations.
Stream/Standby Control
The sensor supports two standby modes: Hard Standby
and Soft Standby. In both modes, external clock can be
optionally disabled to further minimize power consumption.
If this is done, then the “Power−Up Sequence” must be
followed.
Soft Standby
Soft Standby is a low power state that is controlled
through register R0x301A[2]. Depending on the value of
R0x301A[4], the sensor will go to standby after completion
of the current frame readout (default behavior) or after the
completion of the current row readout. When the sensor
comes back from Soft Standby, previously written register
settings are still maintained. Soft standby will not occur if
the TRIGGER pin is held high.
A specific sequence needs to be followed to enter and exit
from Soft Standby.
Entering Soft Standby:
1. Set R0x301A[2] = 0 and drive the TRIGGER pin
LOW
2. External clock can be turned off to further
minimize power consumption (Optional)
Exiting Soft Standby:
1. Enable external clock if it was turned off
2. R0x301A[2] = 1 or drive the TRIGGER pin HIGH
Hard Standby
Hard Standby puts the sensor in lower power state;
previously written register settings are still maintained.
A specific sequence needs to be followed to enter and exit
from Hard Standby.
Entering Hard Standby:
1. R0x301A[8] = 1
2. Assert STANDBY pin
3. External clock can be turned off to further
minimize power consumption (Optional)
Exiting Hard Standby:
1. Enable external clock if it was turned off
2. De−assert STANDBY pin
3. Set R0x301A[8] = 0
Window Control
Registers x_addr_start, x_addr_end, y_addr_start, and
y_addr_end control the size and starting coordinates of the
image window.
The exact window height and width out of the sensor is
determined by the difference between the Y address start and
end registers or the X address start and end registers,
respectively.
The MT9M034 allows different window sizes for context
A and context B.
Blanking Control
Horizontal blank and vertical blank times are controlled
by the line_length_pck and frame_length_lines registers,
respectively.
Horizontal blanking is specified in terms of pixel
clocks. It is calculated by subtracting the X window
size from the line_length_pck register. The minimum
horizontal blanking is 370 pixel clocks.
Vertical blanking is specified in terms of numbers of
lines. It is calculated by subtracting the Y window size
from the frame_length_lines register. The minimum
vertical blanking is 26 lines.
The actual imager timing can be calculated using Table 5
and Table 6, which describe the Line Timing and FV/LV
signals.
When in HDR mode, the maximum size is 1280
× 960.
Readout Modes
Digital Binning
By default, the resolution of the output image is the full
width and height of the FOV as defined above. The output
resolution can be reduced by digital binning. For RGB and
monochrome mode, this is set by the register R0x3032. For
Context A, use bits [1:0], for Context B, use bits [5:4].
Available settings are:
00 = No binning
01 = Horizontal binning
10 = Horizontal and vertical binning
Binning gives the advantage of reducing noise at the cost
of reduced resolution. When both horizontal and vertical
binning are used, a 2x improvement in SNR is achieved,
therefore improving low light performance. Binning results
in a smaller resolution image, but the FOVs between the
binned and unbinned images are the same.
Bayer Space Resampling
All of the pixels in the FOV contribute to the output image
in digital binning mode. This can result in a more pleasing
output image with reduced subsampling artifacts. It also
improves low−light performance. For RGB mode,
resampling can be enabled by setting of register 0x306E[4]
= 1.


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