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データシートサーチシステム |
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データシートサーチシステム |
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SDA9270 データシート(PDF) 11 Page - Siemens Semiconductor Group |
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SDA9270 データシート(HTML) 11 Page - Siemens Semiconductor Group |
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11 / 33 page  SDA 9270 Semiconductor Group 11 2.3 Field Interpolation and Switching In order to reduce the annoying line and edge flickering a frame rate upconversion is implemented. The upconversion includes a combination of interpolation algorithms which are determined via I2C-Bus and then selected automatically depending on the picture motion content. The field interpolation and switching block accepts at its input the data of the two channels A and B, which are the combined luminance and chrominance information respectively of the field A and the field B. The field rate is 100/120 Hz. A fallback mode which corresponds to the operating mode AABB of the original MEGAVISION system is made available. This mode is selected automatically in case of non-standard input signals carrying unstable sync informations or it can be forced via I2C-Bus. 2.4 Motion Detection The motion detection output is switched in a 25/30 Hz frame synchronous raster. As input signals for this block are accepted the luminance signal components of the input channels A and B. By comparing the two fields the motion detector generates an information about 3 possible motion content levels: LOW, MEDIUM and HIGH. 2.5 Field Memory Control The Field Mixer SDA 9270 has to provide the two external field memories – composed of TV-SAM SDA 9251 – with two pairs of control signals. One pair RENA and RENB enables the MEGAVSION system to write the incoming field A and field B information alternately into one field memory block and then into the other. A second pair of control signals OEBA and OEBB enables alternately the output back channels of field memory A and B for the noise reduction in the Picture Processor SDA 9290. Because of the timing the serial address signals SAC and SAR generated by the MSC SDA 9220 must be delayed by 4 SCAD-clock periods. This delay is implemented in the SDA 9270. The Sync signals VS1 and BLN and the clock signal SCAD are used as timing reference signals. 2.6 Frame Synchronization In order to synchronize the data flows within field memories and Field Mixer and to coordinate the signal information with the associated deflection control the Field Mixer SDA 9270 has to generate 25 Hz picture frame sync signals. One 25 Hz frame sync signal is necessary for generating the field memory control signals RENA, RENB, OEBA, OEBB with a pattern repetition of 25 Hz each. This signal is synchronized to the front end side video signal of the MEGAVISION block and uses therefore as input signals the 50 Hz vertical sync signal VS1 generated by the MSC SDA 9220 and the horizontal blanking signal BLN. |
同様の部品番号 - SDA9270 |
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同様の説明 - SDA9270 |
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