データシートサーチシステム |
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74F841 データシート(PDF) 4 Page - NXP Semiconductors |
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74F841 データシート(HTML) 4 Page - NXP Semiconductors |
4 / 12 page Philips Semiconductors Product data 74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 2004 Jan 23 4 LOGIC DIAGRAM for 74F841 1 OE VCC = Pin 24 GND = Pin 12 LQ D Q0 23 13 LE D0 2 LQ D Q1 22 D1 3 LQ D Q2 21 D2 4 LQ D Q3 20 D3 5 LQ D Q4 19 D4 6 LQ D Q5 18 D5 7 LQ C D Q6 17 D6 8 LQ D Q7 16 D7 9 LQ D Q8 15 D8 10 LQ D Q9 14 D9 11 SF01297 74F841 LOGIC DIAGRAM for 74F842 1 OE VCC = Pin 24 GND = Pin 12 LQ D Q0 23 13 LE D0 2 LQ D Q1 22 D1 3 LQ D Q2 21 D2 4 LQ D Q3 20 D3 5 LQ D Q4 19 D4 6 LQ D Q5 18 D5 7 LQ C D Q6 17 D6 8 LQ D Q7 16 D7 9 LQ D Q8 15 D8 10 LQ D Q9 14 D9 11 SF01298 74F842 FUNCTION TABLE for 74F841 and 74F842 INPUTS OUTPUTS INPUTS 74F841 74F842 OPERATING MODE OE LE Dn Qn Qn L H L L H Transparent L H H H L Transparent L ↓ l L H Latched L ↓ h H L Latched H X X Z Z High Impedance L L X NC NC Hold H = HIGH voltage level L = LOW voltage level h = HIGH state one set-up time before the HIGH-to-LOW LE transition l = LOW state one set-up time before the HIGH-to-LOW LE transition ↓ = HIGH-to-LOW transition X = Don’t care NC= No change Z = High impedance “off” state |
同様の部品番号 - 74F841 |
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同様の説明 - 74F841 |
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