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LM76003QRNPTQ1 データシート(PDF) 8 Page - Texas Instruments |
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LM76003QRNPTQ1 データシート(HTML) 8 Page - Texas Instruments |
8 / 54 page 8 LM76002-Q1, LM76003-Q1 SNVSAU3 – DECEMBER 2017 www.ti.com Product Folder Links: LM76002-Q1 LM76003-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Ensured by design. 6.6 Timing Characteristics MIN NOM MAX UNIT CURRENT LIMITS AND HICCUP NOC (1) Number of switching cycles before hiccup is tripped 128 Cycles tOC Overcurrent hiccup retry delay time 46 ms SOFT START (SS/TRK PIN) tSS Internal soft-start time CSS = OPEN, from EN rising edge to PGOOD rising edge 3.5 6.3 ms POWER GOOD (PGOOD PIN) and OVERVOLTAGE PROTECTION tPGOOD_RISE PGOOD rising edge deglitch delay 80 140 200 µs tPGOOD_FALL PGOOD falling edge deglitch delay 80 140 200 µs 6.7 Switching Characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PWM LIMITS (SW PINS) tON-MIN Minimum switch on-time 65 95 ns tOFF-MIN Minimum switch off-time 95 130 ns tON-MAX Maximum switch on-time HS timeout in dropout 3.8 8 11.4 µs OSCILLATOR (RT and SYNC PINS) fOSC Internal oscillator frequency RT = Open 440 500 560 kHz fADJ Minimum adjustable frequency by RT or SYNC RT =133 kΩ, 0.1% 270 300 330 kHz Maximum adjustable frequency by RT or SYNC RT = 17.4 kΩ, 0.1% 1980 2200 2420 VSYNC_HIGH Sync input high level threshold 2 V VSYNC_LOW Sync input low level threshold 0.4 V VMODE_HIGH Mode input high level threshold for FPWM 0.42 V VMODE_LOW Mode input low level threshold for AUTO mode 0.4 V tSYNC_MIN Sync input minimum on- and off- time 80 ns |
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