AD5522 datasheet(51/65 Pages) AD

部品番号	AD5522

部品情報	Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs

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51 / 65 page

AD5522

Data Sheet

Rev. E | Page 50 of 64

WRITE DAC REGISTER

The DAC input, gain, and offset registers are addressed through

a combination of PMU bits (Bit 27 to Bit 24) and mode bits

(Bit 23 and Bit 22). Bit A5 to Bit A0 address each DAC level on

chip. Bit D15 to Bit D0 are the DAC data bits used when writing

to these registers. The PMU address bits allow addressing of a

particular DAC for any combination of PMU channels.

Table 27. DAC Register Bits

B28

B27

B26

B25

B24

B23

B22

B21

B20

B19

B18

B17

B16

B15 to B0

RD/WR

PMU3

PMU2

PMU1

PMU0

MODE1

MODE0

A5

A4

A3

A2

A1

A0

Data Bits[D15 (MSB):D0 (LSB)]

Table 28. DAC Register Functions

Bit

Bit Name

Description

28 (MSB)

RD/WR

When this bit is low, a write function takes place to the selected register; setting the RD/WR bit high initiates a

readback sequence of the PMU, alarm status, comparator status, system control, or DAC register, as determined

by the address bits.

27

PMU3

Bit PMU3 to Bit PMU0 address each PMU and DAC channel in the device. These bits allow control of each

individual DAC channel or any combination of channels, in addition to multichannel programming.

26

PMU2

25

PMU1

24

PMU0

23

MODE1

The MODE1 and MODE0 bits allow addressing of the DAC gain (M), offset (C), or input (X1) register.

22

MODE0

MODE1

MODE0

Action

0

Write to the system control register or the PMU register

0

1

Write to the DAC gain (M) register

1

0

Write to the DAC offset (C) register

1

Write to the DAC input data (X1) register

DAC Register-Specific Bits

21

A5

DAC address bits. The A5 to A3 bits select the register set that is addressed. See the DAC Addressing section.

20

A4

19

A3

18

A2

DAC address bits. The A2 to A0 bits select the DAC that is addressed. See the DAC Addressing section.

17

A1

16

A0

15 to 0

D15 (MSB) to

D0 (LSB)

16 DAC data bits for X1 and C registers. M register is 15 bits wide, D15 to D1.

同様の部品番号 - AD5522

メーカー	部品番号	データシート	部品情報
Analog Devices	AD5522	549Kb / 45P	Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs Rev.PrL
	AD5522	561Kb / 48P	Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs Rev.PrM
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同様の説明 - AD5522

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