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LMR23625-Q1 データシート(PDF) 6 Page - Texas Instruments |
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LMR23625-Q1 データシート(HTML) 6 Page - Texas Instruments |
6 / 40 page 6 LMR23625-Q1 SNVSAR5B – DECEMBER 2016 – REVISED MARCH 2018 www.ti.com Product Folder Links: LMR23625-Q1 Submit Documentation Feedback Copyright © 2016–2018, Texas Instruments Incorporated Electrical Characteristics (continued) Limits apply over the recommended operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CURRENT LIMIT IHS_LIMIT Peak inductor current limit HSOIC package 3.6 4.8 6.2 A WSON package 4.0 5.5 6.6 ILS_LIMIT Valley inductor current limit HSOIC package 2.8 3.5 4.6 A WSON package 2.9 3.6 4.2 IL_ZC Zero cross current limit –0.04 A IL_NEG Negative current limit (FPWM option) –2.7 –2 –1.3 A INTEGRATED MOSFETS RDS_ON_HS High-side MOSFET ON-resistance HSOIC package, VIN = 12 V, IOUT = 1 A 185 m Ω WSON package, VIN = 12 V, IOUT = 1 A 160 RDS_ON_LS Low-side MOSFET ON-resistance HSOIC package VIN = 12 V, IOUT = 1 A 105 m Ω WSON package, VIN = 12 V, IOUT = 1 A 95 THERMAL SHUTDOWN TSHDN Thermal shutdown threshold 162 170 178 °C THYS Hysteresis 15 °C (1) Specified by design. 7.6 Timing Characteristics Over the recommended operating junction temperature range of –40°C to +125°C (unless otherwise noted) MIN NOM MAX UNIT HICCUP MODE NOC (1) Number of cycles that LS current limit is tripped to enter hiccup mode 64 Cycles TOC Hiccup retry delay time SOIC package 5 ms WSON package 12 SOFT START TSS Internal soft-start time. The time of internal reference to increase from 0 V to 1 V SOIC package 1 2 3 ms WSON package 6 POWER GOOD TPGOOD_RISE Power-good flag rising transition deglitch delay 150 μs TPGOOD_FALL Power-good flag falling transition deglitch delay 18 μs |
同様の部品番号 - LMR23625-Q1 |
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同様の説明 - LMR23625-Q1 |
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