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FM21L16 データシート(PDF) 5 Page - Cypress Semiconductor

部品番号 FM21L16
部品情報  2-Mbit (128 K 횞 16) F-RAM Memory
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メーカー  CYPRESS [Cypress Semiconductor]
ホームページ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM21L16 データシート(HTML) 5 Page - Cypress Semiconductor

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FM21L16
Document Number: 001-86191 Rev. *D
Page 5 of 22
Software Write Protect
The 128 K × 16 address space is divided into eight sectors
(blocks) of 16 K × 16 each. Each sector can be individually
software write-protected and the settings are nonvolatile. A
unique address and command sequence invokes the
write-protect mode.
To modify write protection, the system host must issue six read
commands, three write commands, and a final read command.
The specific sequence of read addresses must be provided to
access the write-protect mode. Following the read address
sequence, the host must write a data byte that specifies the
desired protection state of each sector. For confirmation, the
system must then write the complement of the protection byte
immediately after the protection byte. Any error that occurs
including read addresses in the wrong order, issuing a seventh
read address, or failing to complement the protection value will
leave the write protection unchanged.
The write-protect state machine monitors all addresses, taking
no action until this particular read/write sequence occurs. During
the address sequence, each read will occur as a valid operation
and data from the corresponding addresses will be driven to the
data bus. Any address that occurs out of sequence will cause the
software protection state machine to start over. After the address
sequence is completed, the next operation must be a write cycle.
The lower data byte contains the write-protect settings. This
value will not be written to the memory array, so the address is a
don't-care. Rather it will be held pending the next cycle, which
must be a write of the data complement to the protection settings.
If the complement is correct, the write-protect settings will be
adjusted. Otherwise, the process is aborted and the address
sequence starts over. The data value written after the correct six
addresses will not be entered into the memory.
The protection data byte consists of eight bits, each associated
with the write-protect state of a sector. The data byte must be
driven to the lower eight bits of the data bus, DQ7 - DQ0. Setting
a bit to ‘1’ write-protects the corresponding sector; a ‘0’ enables
writes for that sector. The following table shows the write-protect
sectors with the corresponding bit that controls the write-protect
setting.
The write-protect address sequence follows:
1. Read address 12555h
2. Read address 1DAAAh
3. Read address 01333h
4. Read address 0ECCCh
5. Read address 000FFh
6. Read address 1FF00h
7. Write address 1DAAAh
8. Write address 0ECCCh
9. Write address 0FF00h
10.Read address 00000h
Note
If CE is LOw entering the sequence, then an address of
00000h must precede 12555h.
The address sequence provides a secure way of modifying the
protection. The write-protect sequence has a one in 3 × 1032
chance of randomly accessing exactly the first six addresses.
The odds are further reduced by requiring three more write
cycles, one that requires an exact inversion of the data byte.
Figure 3 on page 6 shows a flow chart of the entire write-protect
operation. The write-protect settings are nonvolatile. The factory
default: all blocks are unprotected.
For example, the following sequence write-protects addresses
from 0C000h to 13FFFh (sectors 3 and 4):
Figure 2. Sleep/Standby State Diagram
Initialize
Normal
Operation
Standby
Sleep
Power
Applied
ZZ LOW
ZZ HIGH
CE HIGH,
ZZ HIGH
CE LOW,
ZZ HIGH
CE LOW,
ZZ HIGH
ZZ LOW
CE HIGH,
ZZ HIGH
Table 1. Write Protect Sectors - 16 K × 16 Blocks
Sectors
Blocks
Sector 7
1FFFFh–1C000h
Sector 6
1BFFFh–18000h
Sector 5
17FFFh–14000h
Sector 4
13FFFh–10000h
Sector 3
0FFFFh–0C000h
Sector 2
0BFFFh–08000h
Sector 1
07FFFh–04000h
Sector 0
03FFFh–00000h
Address
Data
Read
12555h
Read
1DAAAh
Read
01333h
Read
0ECCCh
Read
000FFh
Read
1FF00h
Write
1DAAAh
18h; bits 3 and 4 = 1
Write
0ECCCh
E7h; complement of 18h
Write
0FF00h
Don’t care
Read
00000h


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