SiP12110

www.vishay.com

Vishay Siliconix

S14-1891-Rev. A, 15-Sep-14

10

Document Number: 64299

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 22 - Over-Current Protection Illustration

Output Under-Voltage Protection (UVP)

20 μs, then UVP event is recognized and both HS and LS

MOSFETs are turned off. UVP latches the device off until

UVP is only active after the completion of soft-start

sequence.

Output Over-Voltage Protection (OVP)

For OVP implementation, output is monitored through

21 % (typ.), OVP is triggered with HS FET turning off and

LS FET turning on immediately to discharge the output.

0.675 V.

Over-Temperature Protection (OTP)

SiP12110 has internal thermal monitor block that turns off

both HS and LS FETs when junction temperature is above

160 °C (typ.). A hysteresis of 30 °C is implemented, so when

junction temperature drops below 130 °C, the device

restarts by initiating the soft-start sequence again.

Soft Start up

SiP12110 soft-start time is adjustable by selecting a

rising monotonically to the programmed output voltage.

There is an internal 5 μA current source tied to the soft start

pin which charges the external soft start cap

During soft-start period, OCP is activated. OVP and

short-circuit protection are not active until soft-start is

complete.

Pre-bias Startup

In case of pre-bias startup, output is monitored through

internal reference ramp value, control logic prevents HS and

LS FET from switching to avoid negative output voltage

spike and excessive current sinking through LS FET.

pin high up to 5 V through a 10K resistor to use this signal.

power good window is shown in the below diagram. If

is de-asserted by pulling down to GND.

Skipped GH pulse

I

load

OCP

threshold

I

inductor

GH

SS time

Cext

0.8 V

×

5 μA

---------------------------------

=

V

V

FB

V

(typ. = 0.725 V)

V

(typ. = 0.675 V)

V

(typ. = 0.525 V)

V

(typ. = 0.575 V)

PG

Pull-high

Pull-low