データシートサーチシステム |
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ACT8847_17 データシート(PDF) 29 Page - Active-Semi, Inc |
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ACT8847_17 データシート(HTML) 29 Page - Active-Semi, Inc |
29 / 42 page ACT8847 Rev 9, 27-June-17 Innovative PowerTM - 29 - www.active-semi.com Copyright © 2015-2017 Active-Semi, Inc. ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. nRSTO Output nRSTO is an open-drain output which asserts low upon startup or when manual reset is asserted via the nPBIN input. When asserted on startup, nRSTO remains low until reset time-out period expires. When asserted due to manual-reset, nRSTO immediately asserts low, then remains asserted low until the nPBIN input is de-asserted and the reset time-out period expires. Connect a 10kΩ or greater pull-up resistor from nRSTO to an appropriate voltage supply. nIRQ Output nIRQ is an open-drain output that asserts low any time an interrupt is generated. Connect a 10kΩ or greater pull-up resistor from nIRQ to an appropriate voltage supply. nIRQ is typically used to drive the interrupt input of the system processor. Many of the ACT8847's functions support interrupt- generation as a result of various conditions. These are typically masked by default, but may be unmasked via the I2C interface. For more information about the available fault conditions, refer to the appropriate sections of this datasheet. Push-Button Control The ACT8847 is designed to initiate a system enable sequence when the nPBIN multi-function input is asserted. Once this occurs, a power-on sequence commences, as described below. The power-on sequence must complete and the microprocessor must take control (by asserting PWRHLD) before nPBIN is de-asserted. If the microprocessor is unable to complete its power-up routine successfully before the user releases the push-button, the ACT8847 automatically shuts the system down. This provides protection against accidental or momentary assertions of the push- button. If desired, longer “push-and-hold” times can be implemented by simply adding an additional time delay before asserting PWREN or PWRHLD. Control Sequences The ACT8847 features a variety of control sequences that are optimized for supporting system enable and disable, as well as SLEEP mode of the Samsung S5PC210 / S5PV310 processors. Enabling/Disabling Sequence A typical enable sequence is initiated whenever the nPBIN is asserted low via 50KΩ resistance. The power control diagram is shown in Figure 3. During the boot sequence, the microprocessor must assert PWRHLD (XPSHOLD), and PWREN (XPWRRGTON), to ensure that the system remains powered after nPBIN is released. Once the power- up routine is completed, the system remains enabled after the push-button is released as long as PWRHLD is asserted high. If the processor does not assert PWRHLD before the user releases the push-button, the boot-up sequence is terminated and all regulators are disabled. This provides protection against "false-enable", when the push- button is accidentally depressed, and also ensures that the system remains enabled only if the processor successfully completes the boot-up sequence. As with the enable sequence, a typical disable sequence is initiated when the user presses the push-button, which interrupts the processor via the nPBSTAT output. The actual disable sequence is completely software-controlled, but typically involved initiating various “clean-up” processes before the processor finally de-asserts PWRHLD. SLEEP Mode Sequence The ACT8847 supports S5PC210 / S5PV310 processors’ SLEEP mode operation. Once a successful power-up routine has been completed, SLEEP mode may be initiated through a variety of software-controlled mechanisms. SLEEP mode is typically initiated when the user presses the push-button during normal operation. Pressing the push-button asserts the nPBIN input, which asserts the nPBSTAT output, which interrupts the processor. In response to this interrupt the processor should de-assert PWREN(XPWRRGTON), disabling REG2/3/4/5/8/9/10/11. PWRHLD should remain asserted during SLEEP mode so that REG1/6/7/12 remain enabled. The ACT8847 wakes up from SLEEP mode when either the push-button and/or PWREN (XPWRRGTON) is asserted. In either case, REG2/3/4/5/8/9/10/11 are enable which allow the system to resume normal operation. |
同様の部品番号 - ACT8847_17_06 |
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同様の説明 - ACT8847_17_06 |
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