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S29GL512N データシート(PDF) 57 Page - Cypress Semiconductor |
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S29GL512N データシート(HTML) 57 Page - Cypress Semiconductor |
57 / 92 page Document Number: 002-01522 Rev. *B Page 57 of 92 S29GL512N S29GL256N S29GL128N Legend X = Don’t care. RA = Read Address. RD = Read Data. PA = Program Address. Addresses latch on the falling edge of WE# or CE# pulse, whichever occurs later. PD = Program Data. Data latches on the rising edge of WE# or CE# pulse, whichever occurs first. SA = Sector Address. Any address that falls within a specified sector. See Tables – for sector address ranges. WBL = Write Buffer Location. Address must be within the same write buffer page as PA. WC = Word Count. Number of write buffer locations to load minus 1. Notes 1. See Table on page 10 for description of bus operations. 2. All values are in hexadecimal. 3. Shaded cells indicate read cycles. 4. Address and data bits not specified in table, legend, or notes are don’t cares (each hex digit implies 4 bits of data). 5. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system must write the reset command to return reading array data. 6. No unlock or command cycles required when bank is reading array data. 7. Reset command is required to return to reading array data in certain cases. See Reset Command on page 43 for details. 8. Data in cycles 5 and 6 are listed in Table on page 34. 9. The data is 00h for an unprotected sector and 01h for a protected sector. PPB Status Read provides the same data but in inverted form. 10. If DQ7 = 1, region is factory serialized and protected. If DQ7 = 0, region is unserialized and unprotected when shipped from factory. See Secured Silicon Sector Flash Memory Region on page 39 for more information. 11. Command is valid when device is ready to read array data or when device is in autoselect mode. 12. Total number of cycles in the command sequence is determined by the number of words written to the write buffer. 13. Command sequence resets device for next command after write-to-buffer operation. 14. Requires Entry command sequence prior to execution. Unlock Bypass Reset command is required to return to reading array data. Memory Array Commands (x8) Command Sequence (Notes) Bus Cycles (Notes 1–5) First Second Third Fourth Fifth Sixth Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Asynchronous Read (6) 1RA RD Reset (7) 1XXX F0 Manufacturer ID 4 AAA AA 555 55 AAA 90 X00 01 Device ID (8) 6 AAA AA 555 55 AAA 90 X02 XX7E X1C Data X1E Data Sector Protect Verify (9) 4 AAA AA 555 55 AAA 90 [SA]X04 Data Secure Device Verify (10) 4 AAA AA 555 55 AAA 90 X06 Data CFI Query (11) 1AA 98 Program 4 AAA AA 555 55 AAA A0 PA PD Write to Buffer (12) 6 AAA AA 555 55 PA 25 SA WC PA PD WBL PD Program Buffer to Flash 1 SA 29 Write to Buffer Abort Reset (13) 3 AAA AA PA 55 555 F0 Entry 3 AAA AA 555 55 AAA 20 Program (14) 2 XXX A0 PA PD Sector Erase (14) 2 XXX 80 SA 30 Chip Erase (14) 2 XXX 80 SA 10 Reset 2 XXX 90 XXX 00 Chip Erase 6 AAA AA 555 55 AAA 80 AAA AA 555 55 AAA 10 Sector Erase 6 AAA AA 555 55 AAA 80 AAA AA 555 55 SA 30 Erase/Program Suspend (15) 1XXX B0 Erase/Program Resume (16) 1XXX 30 Entry 3 AAA AA 555 55 AAA 88 Program (17) 4 AAA AA 555 55 AAA A0 PA PD Read (17) 100Data Exit (17) 4 AAA AA 555 55 AAA 90 XXX 00 |
同様の部品番号 - S29GL512N |
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同様の説明 - S29GL512N |
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