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FAN3100C データシート(PDF) 1 Page - ON Semiconductor |
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FAN3100C データシート(HTML) 1 Page - ON Semiconductor |
1 / 21 page © 2007 Semiconductor Components Industries, LLC. Publication Order Number: December-2017, Rev . 2 FAN3100T/D FAN3100C / FAN3100T Single 2 A High-Speed, Low-Side Gate Driver Features 3 A Peak Sink/Source at V DD = 12 V 4.5 to 18 V Operating Range 2.5 A Sink / 1.8 A Source at V OUT = 6 V Dual-Logic Inputs Allow Configuration as Non-Inverting or Inverting w ith Enable Function Internal Resistors Turn Driver Off If No Inputs 13 ns Typical Rise Time and 9 ns Typical Fall-Time w ith 1 nF Load Choice of TTL or CMOS Input Thresholds MillerDrive™ Technology Typical Propagation Delay Time Under 20 ns w ith Input Falling or Rising 6-Lead, 2x2 mm MLP or 5-Pin, SOT23 Packages Rated from –40°C to 125°C Ambient Applications Sw itched-Mode Pow er Supplies (SMPS) High-Efficiency MOSFET Sw itching Synchronous Rectifier Circuits DC-to-DC Converters Motor Control Description The FAN3100 2 A gate driver is designed to drive an N- channel enhancement-mode MOSFET in low -side sw itching applications by providing high peak current pulses during the short sw itching intervals. The driver is available w ith either TTL (FAN3100T) or CMOS (FAN3100C) input thresholds. Internal circuitry provides an under-voltage lockout function by holding the output LOW until the supply voltage is w ithin the operating range. The FAN3100 delivers fast MOSFET sw itching performance, w hich helps maximize efficiency in high- frequency pow er converter designs. FAN3100 drivers incorporate MillerDrive™ architecture for the final output stage. This bipolar-MOSFET combination provides high peak current during the Miller plateau stage of the MOSFET turn-on / turn-off process to minimize sw itching loss, w hile providing rail-to-rail voltage sw ing and reverse current capability. The FAN3100 also offers dual inputs that can be configured to operate in non-inverting or inverting mode and allow implementation of an enable function. If one or both inputs are left unconnected, internal resistors bias the inputs such that the output is pulled LOW to hold the pow er MOSFET off. The FAN3100 is available in a lead-free finish, 2x2 mm, 6- lead, Molded Leadless Package (MLP) for the smallest size w ith excellent thermal performance; or industry- standard, 5-pin, SOT23. Functional Pin Configurations 1 6 5 2 4 3 IN+ AGND VDD IN- PGND OUT 1 2 3 5 4 VDD GND IN+ IN − OUT |
同様の部品番号 - FAN3100C |
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同様の説明 - FAN3100C |
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