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FAN3100C データシート(PDF) 16 Page - ON Semiconductor |
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FAN3100C データシート(HTML) 16 Page - ON Semiconductor |
16 / 21 page www.onsemi.com 16 Operational Waveforms At pow er up, the driver output remains LOW until the VDD voltage reaches the turn-on threshold. The magnitude of the OUT pulses rises w ith VDD until steady-state VDD is reached. The non-inverting operation illustrated in Figure 47 show s that the output remains LOW until the UVLO threshold is reached, then the output is in-phase w ith the input. V DD IN+ IN- OUT Turn-on Threshold Figure 47. Non-Inverting Start-Up Waveform s For the inverting configuration of Figure 46, start-up w aveforms are show n in Figure 48. With IN+ tied to VDD and the input signal applied to IN–, the OUT pulses are inverted w ith respect to the input. At pow er up, the inverted output remains LOW until the VDD voltage reaches the turn-on threshold, then it follow s the input w ith inverted phase. V DD IN+ (V DD) IN- OUT Turn-on Threshold Figure 48. Inverting Start-Up Waveform s Thermal Guidelines Gate drivers used to sw itch MOSFETs and IGBTs at high frequencies can dissipate significant amounts of pow er. It is important to determine the driver pow er dissipation and the resulting junction temperature in the application to ensure that the part is operating w ithin acceptable temperature limits. The total pow er dissipation in a gate driver is the sum of tw o components; PGATE and PDYNAMIC: PTOTAL = PGATE + PDYNAMIC (1) Gate Driving Loss: The most significant pow er loss results from supplying gate current (charge per unit time) to sw itch the load MOSFET on and off at the sw itching frequency. The pow er dissipation that results from driving a MOSFET at a specified gate- source voltage, VGS, w ith gate charge, QG, at sw itching frequency, fSW, is determined by: PGATE = QG • VGS • fSW (2) Dynamic Pre-drive / Shoot-through Current: A pow er loss resulting from internal current consumption under dynamic operating conditions, including pin pull-up / pull-dow n resistors, can be obtained using the IDD (no-Load) vs. Frequency graphs in Typical Performance Characteristics to determine the current IDYNAMIC draw n from VDD under actual operating conditions: PDYNAMIC = IDYNAMIC • VDD (3) Once the pow er dissipated in the driver is determined, the driver junction rise w ith respect to circuit board can be evaluated using the follow ing thermal equation, assuming ψ JB w as determined for a similar thermal design (heat sinking and air flow ): TJ = PTOTAL • ψJB + TB (4) w here: TJ = driver junction temperature ψ JB = (psi) thermal characterization parameter relating temperature rise to total pow er dissipation TB = board temperature in location defined in the Thermal Characteristics table. In a typical forw ard converter application w ith 48 V input, as show n in Figure 49, the FDS2672 w ould be a potential MOSFET selection. The typical gate charge w ould be 32 nC w ith VGS = VDD = 10 V. Using a TTL input driver at a sw itching frequency of 500 kHz, the total pow er dissipation can be calculated as: PGATE = 32 nC • 10 V • 500 kHz = 0.160 W (5) PDYNAMIC = 8 mA • 10 V = 0.080 W (6) PTOTAL = 0.24 W (7) The 5-pin SOT23 has a junction-to-lead thermal characterization parameter ψJB = 51°C/W. In a system application, the localized temperature around the device is a function of the layout and construction of the PCB along w ith airflow across the surfaces. To ensure reliable operation, the maximum junction temperature of the device must be prevented from exceeding the maximum rating of 150°C; w ith 80% derating, TJ w ould be limited to 120°C. Rearranging Equation 4 determines the board temperature required to maintain the junction temperature below 120°C: TB,MAX = TJ - PTOTAL • ψJB (8) TB,MAX = 120°C – 0.24W • 51°C/W = 108°C (9) For comparison purposes, replace the 5-pin SOT23 used in the previous example w ith the 6-pin MLP package w ith ψ JB = 2.8°C/W. The 6-pin MLP package can operate at a PCB temperature of 119°C, w hile maintaining the junction temperature below 120°C. This illustrates that the physically smaller MLP package w ith thermal pad offers a more conductive path to remove the heat from the driver. Consider the tradeoffs betw een reducing overall circuit size w ith junction temperature reduction for increased reliability. |
同様の部品番号 - FAN3100C |
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同様の説明 - FAN3100C |
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