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LM27952SD データシート(PDF) 4 Page - National Semiconductor (TI) |
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LM27952SD データシート(HTML) 4 Page - National Semiconductor (TI) |
4 / 8 page Electrical Characteristics (Notes 2, 7) (Continued) Limits in standard typeface are for T A = 25˚C, and limits in boldface type apply over the full operating junction temperature range (-40˚C to +85 ˚C). Unless otherwise noted, specifications apply to the LM27952 Typical Application Circuit (pg.1) with V IN = 3.6V, V(EN) = 1.8V, V(PWM) = 1.8V, 4 LEDs, V DX = 0.45V, CIN =COUT = 3.3µF, C1 =C2 = 1µF, RSET = 12.5k Ω (Note 8) Symbol Parameter Conditions Min Typ Max Units I IH Logic Input High Current Input Pin: PWM V(PWM) = 1.8V 10 nA Input Pin: EN V(EN) = 1.8V (Note 11) 12 µA I IL Logic Input Low Current Input Pins: EN, PWM V(EN, PWM) = 0V 10 nA R OUT Charge Pump Output Resistance (Note 12) 3.3 Ω V GDX 1x to 3/2x Gain Transition Voltage Threshold on V DX V DX Falling 450 mV t ON Startup Time I DX = 90% steady state 330 µs Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150˚C (typ.) and disengages at TJ = 140˚C (typ.). Note 4: The Human-body model is a 100 pF capacitor discharged through a 1.5k Ω resistor into each pin. Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operation junction temperature (TJ-MAX-OP =115 oC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX =TJ-MAX-OP -(θJA xPD-MAX). Note 6: Junction-to-ambient thermal resistance ( θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm witha2x1 array of thermal vias. The ground plane on the board is 50mm x 50mm. Thickness of copper layers are 36µm/18µm /18µm/36µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22˚C, still air. Power dissipation is 1W. The value of θJA of the LM27952 in LLP-14 could fall in a range as wide as 45oC/W to 150oC/W (if not wider), depending on PWB material, layout, and environmental conditions. In applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be paid to thermal dissipation issues. For more information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet.. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: CIN,COUT,C1,C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics Note 9: LED Current Matching is based on two calculations: [(IMAX -IAVG)÷IAVG] and [(IAVG -IMIN)÷IAVG]. IMAX and IMIN are the highest and lowest respective Dx currents, and IAVG is the average Dx current of all four current sinks. The largest number of the two calculations (worst case) is considered the matching figure for the part. The typical specification provided is the most likely norm of the matching figure for all parts. Note 10: Headroom Voltage = VDX to GND. If headroom voltage requirement is not met, LED current regulation will be compromised. Note 11: EN Logic Input High Current (IIH) is due to a 150kΩ (typ.) pull-down resistor connected internally between the EN and GND pins. Note 12: The open loop output resistance (ROUT) models all voltage losses in the charge pump. ROUT can be used to estimate the voltage at the charge pump output VOUT and the maximum current capability of the device under low VIN and high IOUT conditions, beyond what is specified in the electrical specifications table: VOUT =(GxVIN)-(ROUT xIOUT). In the equation, G is the charge pump gain mode, and IOUT is the total output current (sum of all active Dx current sinks and all current drawn from VOUT). Note 13: Turn-on time is measured from when the EN signal is pulled high until the output voltage on VOUT crosses 90% of its final value. www.national.com 4 |
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