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ADS1278-SP データシート(PDF) 23 Page - Texas Instruments |
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ADS1278-SP データシート(HTML) 23 Page - Texas Instruments |
23 / 57 page DS Modulator1 Digital Filter1 VREFP V IN1 VREFN V REF S TEST[1:0] FORMAT[2:0] CLK SYNC PWDN [8:1] CLKDIV MODE[1:0] DRDY /FSYNC SCLK DOUT [8:1] DIN SPI and Frame-Sync Interface Control Logic AINP1 AINN1 VCOM S DS Modulator2 Digital Filter2 V IN2 S AINP2 AINN2 DS Modulator8 Digital Filter8 V IN4/8 S AINP8 AINN8 DVDD AVDD AGND DGND IOVDD R R Modulator Output Mod 1 Mod 2 Mod 8 23 ADS1278-SP www.ti.com SBAS937 – SEPTEMBER 2018 Product Folder Links: ADS1278-SP Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Sampling Aperture Matching The ADS1278-SP converter operates from the same CLK input. The CLK input controls the timing of the modulator sampling instant. The converter is designed such that the sampling skew, or modulator sampling aperture match between channels, is controlled. Furthermore, the digital filters are synchronized to start the convolution phase at the same modulator clock cycle. This design results in excellent phase match among the ADS1278-SP channels. Figure 37 shows the inter-device channel sample matching for the ADS1278-SP. 8.3.2 Frequency Response The digital filter sets the overall frequency response. The filter uses a multi-stage FIR topology to provide linear phase with minimal passband ripple and high stop band attenuation. The filter coefficients are identical to the coefficients used in the ADS1271. The oversampling ratio of the digital filter (that is, the ratio of the modulator sampling to the output data rate, or fMOD/fDATA) is a function of the selected mode, as shown in Table 1. Table 1. Oversampling Ratio vs Mode MODE SELECTION OVERSAMPLING RATIO (fMOD/fDATA) High-Speed 64 High-Resolution 128 Low-Power 64 Low-Speed 64 |
同様の部品番号 - ADS1278-SP |
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同様の説明 - ADS1278-SP |
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