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MC7445ARX1000LG データシート(PDF) 37 Page - Freescale Semiconductor, Inc |
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MC7445ARX1000LG データシート(HTML) 37 Page - Freescale Semiconductor, Inc |
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37 / 64 page  MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1 Freescale Semiconductor 37 Pinout Listings TBEN E1 High Input BVSEL TBST F11 Low Output BVSEL TCK C6 High Input BVSEL TDI B9 High Input BVSEL 7 TDO A4 High Output BVSEL TEA L1 Low Input BVSEL TEST[0:3] A12, B6, B10, E10 — Input BVSEL 2 TEST[4] D10 — Input BVSEL 9 TMS F1 High Input BVSEL 7 TRST A5 Low Input BVSEL 7, 14 TS L4 Low I/O BVSEL 8 TSIZ[0:2] G6, F7, E7 High Output BVSEL TT[0:4] E5, E6, F6, E9, C5 High I/O BVSEL WT D3 Low Output BVSEL 8 VDD H8, H10, H12, J7, J9, J11, J13, K8, K10, K12, K14, L7, L9, L11, L13, M8, M10, M12 —— N/A Notes: 1. OVDD supplies power to the processor bus, JTAG, and all control signals; and VDD supplies power to the processor core and the PLL (after filtering to become AVDD). To program the I/O voltage, connect BVSEL to either GND (selects 1.8 V) or to HRESET (selects 2.5 V). If used, the pulldown resistor should be less than 250 Ω. For actual recommended value of Vin or supply voltages see Table 4. 2. These input signals are for factory use only and must be pulled up to OVDD for normal machine operation. 3. These signals are for factory use only and must be left unconnected for normal machine operation. 4. Ignored in 60x bus mode. 5. This signal selects between MPX bus mode (asserted) and 60x bus mode (negated) and will be sampled at HRESET going high. 6. This signal must be negated during reset, by pull-up to OVDD or negation by ¬HRESET (inverse of HRESET), to ensure proper operation. 7. Internal pull-up on die. 8. These pins require weak pull-up resistors (for example, 4.7 k Ω) to maintain the control signals in the negated state after they have been actively negated and released by the MPC7445 and other bus masters. 9. These input signals are for factory use only and must be pulled down to GND for normal machine operation. 10.This pin can externally cause a performance monitor event. Counting of the event is enabled via software. 11.Unused address pins must be pulled down to GND. 12.This test signal is recommended to be tied to HRESET; however, other configurations will not adversely affect performance. 13.These signals must be pulled down to GND if unused, or if the MPC7445 is in 60x bus mode. 14.This signal must be asserted during reset, by pull-down to GND or assertion by HRESET, to ensure proper operation. Table 15. Pinout Listing for the MPC7445, 360 CBGA Package (continued) Signal Name Pin Number Active I/O I/F Select 1 Notes |
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