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DM54LS55 データシート(PDF) 1 Page - National Semiconductor (TI) |
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DM54LS55 データシート(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF10174 April 1992 DM54LS55DM74LS55 2-Wide 4-Input AND-OR-INVERT Gate General Description This device contains a combination of AND-OR-INVERT functions The internal gates are configured as two four-input AND gates with their outputs connected to a two-input NOR gate Connection Diagram Dual-In-Line Package TLF10174 – 1 Order Number DM54LS55J DM54LS55W DM74LS55M or DM74LS55N See NS Package Number J14A M14A N14A or W14B Function Table Y e ABCD a EFGH Inputs Output ABCD E F G H Y HHHH X X X X L XXXX H H H H L All Other Combinations H H e High Logic Level L e Low Logic Level X e Either Low or High Logic Level C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
同様の部品番号 - DM54LS55 |
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同様の説明 - DM54LS55 |
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