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SMSC DS – FDC37N958FR
Page 3
Rev. 09/01/99
DESCRIPTION OF PIN FUNCTIONS
PinPin
PIN #
NAME
DESCRIPTION
SUPPLY
VOLTAGE
TYPE
HOST (ISA) INTERFACE
80:82,
84:88
SD[0:7]
System Data Bus
VCC2
I/O24
54:69
SA[0:15]
System Address Bus
VCC2
I
96
nROMCS
ROM Chip Select
VCC2
I
79
AEN
Address Enable (DMA master has
bus control)
VCC2
I
95
IOCHRDY
I/O Channel Ready
VCC2
OD24
91,93
DRQ[0:1]
DMA Requests
VCC2
O24
202, 201
DRQ[2:3]/
OUT[8:9]
DMA Requests/GP Outputs
VCC2
O24
90, 92
nDACK[0:1]
DMA Acknowledge
VCC2
I
207, 208
nDACK[2:3]/
GPIO18, 19
DMA Acknowledge/GPIO 18,19
VCC2
I/IO8
94
TC
Terminal Count
VCC2
I
77
nIOR
I/O Read
VCC2
I
78
nIOW
I/O Write
VCC2
I
97
nMEMRD
Memory Read
VCC2
I
98
nMEMWR
Memory Write
VCC2
I
70
IRQ6(FDC)/
OUT0
Floppy Disk Interrupt Request/
Generic Output 0
VCC2
O24
71
nIRQ8/
OUT1
Active low Interrupt Request 8/
Generic Output 1
VCC2
O24
72
IRQ7(PP)/
OUT2
Parallel Port Interrupt Request/
Generic Output 2
VCC2
O24
74
IRQ12(M)/
OUT3
Mouse Interrupt Request/
Generic Output 3
VCC2
O24
75
IRQ1(KB)/
OUT4
Keyboard Interrupt Request/
Generic Output 4
VCC2
O24
76
nNOWS
No Wait State
VCC2
OD24
FLASH ROM/ MEMORY MAP INTERFACE
161:166,
168:169
FAD[7:0]
Flash Address/Data[7:0] Bus
VCC1
I/O8
170:175,
177:180
FA[8:17]
Flash Address[17:8]
VCC1
O8
182
nFRD
Flash Memory Read
VCC1
O8