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MC10EP05D データシート(PDF) 1 Page - ON Semiconductor

部品番号 MC10EP05D
部品情報  2-Input Differential AND/NAND
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メーカー  ONSEMI [ON Semiconductor]
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MC10EP05D データシート(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 1999
September, 1999 – Rev. 1.0
1
Publication Order Number:
MC10EP05/D
MC10EP05
2-Input Differential AND/NAND
The MC10EP05 is a 2–input differential AND/NAND gate. The
device is functionally equivalent to the EL05 and LVEL05 devices.
With AC performance much faster than the LVEL05 device, the EP05
is ideal for applications requiring the fastest AC performance
available.
170ps Typical Propagation Delay
High Bandwidth to 3 Ghz Typical
ECL mode: 0V VCC with VEE = –3.0V to –5.5V
PECL mode: 3.0V to 5.5V VCC with VEE = 0V
Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
Q Output will default LOW with inputs open or at VEE
ESD Protection: >4KV HBM, >200V MM
New Differential Input Common Mode Range
Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.
For Additional Information, See Application Note AND8003/D
Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
Transistor Count = 137 devices
1
2
3
45
6
7
8
Q
VEE
VCC
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram
D0
Q
D1
D1
D0
SO–8
D SUFFIX
CASE 751
PIN DESCRIPTION
PIN
D0, D1, D0, D1
Q, Q
ECL Data Outputs
FUNCTION
ECL Data Inputs
http://onsemi.com
D0
D1
D0
D1
QQ
LL
H
H
L
H
LH
H
L
L
H
HL
L
H
L
H
HH
L
L
H
L
TRUTH TABLE
MARKING DIAGRAM
Device
Package
Shipping
ORDERING INFORMATION
MC10EP05D
SOIC
98 Units/Rail
MC10EP05DR2
SOIC
2500 Tape & Reel
HEP05
1
8
1
8
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
ALYW
*For additional information, see Application Note
AND8002/D


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