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CDCDB2000 データシート(PDF) 22 Page - Texas Instruments

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部品番号. CDCDB2000
部品情報  CDCDB2000 DB2000QL-Compliant 20-Output Clock Buffer for PCIe Gen 1 to Gen 5
ダウンロード  33 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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CDCDB2000 Datasheet(HTML) 22 Page - Texas Instruments

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CDCDB2000
SNAS787 – NOVEMBER 2019
www.ti.com
Product Folder Links: CDCDB2000
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Table 12. BTRDCNT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-6
RESERVED
R
0h
Reserved
5-0
Read Byte Count[5:0]
R/W
8h
Writing to this register configures how many bytes will be read back.
7.6.1.9 SBIMSK1 Register (Address = 8h) [reset = 0h]
SBIMSK1 is shown in Table 13.
Return to the Summary Table.
The SBIMSK1 register allows the SMBus to force enable each output channel individually when the CDCDB2000
is in Side-Band interface mode.
Table 13. SBIMSK1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
SBI Output Mask, CK7
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK7 Enabled
6
SBI Output Mask, CK6
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK6 Enabled
5
SBI Output Mask, CK5
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK5 Enabled
4
SBI Output Mask, CK4
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK4 Enabled
3
SBI Output Mask, CK3
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK3 Enabled
2
SBI Output Mask, CK2
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK2 Enabled
1
SBI Output Mask, CK1
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK1 Enabled
0
SBI Output Mask, CK0
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK0 Enabled
7.6.1.10 SBIMSK2 Register (Address = 9h) [reset = 0h]
SBIMSK2 is shown in Table 14.
Return to the Summary Table.
The SBIMSK2 register allows the SMBus to force enable each output channel individually when the CDCDB2000
is in Side-Band interface mode.
Table 14. SBIMSK2 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
SBI Output Mask, CK15
R/W
0h
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK15 Enabled


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