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CDB42448 データシート(PDF) 8 Page - Cirrus Logic |
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CDB42448 データシート(HTML) 8 Page - Cirrus Logic |
8 / 70 page 8 DS648PP2 DAC_SDIN1 DAC_SDIN2 DAC_SDIN3 DAC_SDIN4 17 16 15 14 DAC Serial Audio Data Input (Input) - Input for two’s complement serial audio data. DAC_SCLK 18 DAC Serial Clock (Input/Output) - Serial clock for the DAC serial audio interface. Input frequency must be 256xFs in the TDM digital interface format. DAC_LRCK 19 DAC Left/Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the DAC serial audio data line. Signals the start of a new TDM frame in the TDM digital inter- face format. AUX_LRCK 20 Auxiliary Left/Right Clock (Output) - Determines which channel, Left or Right, is currently active on the Auxiliary serial audio data line. Derived from the ADC serial port and equals Fs. AUX_SCLK 21 Auxiliary Serial Clock (Output) - Serial clock for the Auxiliary serial audio interface. AUX_SDIN 22 Auxiliary Serial Input (Input) - Provides an additional serial input for two’s complement serial audio data. Used only in the TDM digital interface format. AOUT1 +,- AOUT2 +,- AOUT3 +,- AOUT4 +,- AOUT5 +,- AOUT6 +,- 26,25 27,28 30,29 31,32 34,33 36,37 Differential Analog Output (Output) - The full-scale analog output level is specified in the Analog Characteristics table. Each leg of the differential outputs may also be used single-ended. AGND 42,56 Analog Ground (Input) - VQ 43 Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage. VA 44,53 Analog Power (Input) - Positive power supply for the analog section. See “Digital I/O Pin Charac- teristics” on page 9. AIN1 +,- AIN2 +,- AIN3 +,- AIN4 +,- AIN5 +,- AIN6 +,- 46,45 48,47 50,49 52,51 58,57 60,59 Differential Analog Input (Input) - Signals are presented differentially or single-ended to the Delta-Sigma modulators. The full-scale input level is specified in the Analog Characteristics speci- fication table. See below for a description of AIN5-AIN6 in Single-Ended Mode. AIN5 A,B AIN6 A,B 58,57 60,59 Single-Ended Analog Input (Input) - When stereo ADC3 is in Single-Ended Mode, an internal analog mux allows selection between 2 channels for both analog inputs AIN5 and AIN6 (see sec- tion 4.2.2 for details). The unused leg of each input is internally connected to common mode. The full-scale input level is specified in the Analog Characteristics table. MUTEC 35 Mute Control (Output) - Used as a control for external mute circuits to prevent the clicks and pops that can occur in any single supply system. FILT+_DAC 54 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits of the DAC. FILT+_ADC 55 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits of the ADC. INT 61 Interrupt (Output) - Signals either an ADC overflow condition has occurred in one or more of the ADC inputs, or a clocking error has occurred in the DAC/ADC as specified in the Interrupt register. SCL/CCLK 63 Serial Control Port Clock (Input) - Serial clock for the control port interface. SDA/CDOUT 64 Serial Control Data I/O (Input/Output) - Input/Output for I2C data. Output for SPI data. |
同様の部品番号 - CDB42448 |
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同様の説明 - CDB42448 |
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