データシートサーチシステム |
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SN74LV4320AGKFR データシート(PDF) 2 Page - Texas Instruments |
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SN74LV4320AGKFR データシート(HTML) 2 Page - Texas Instruments |
2 / 23 page SN74LV4320A LOW POWER, DUALSUPPLY, LEVELTRANSLATING CompactFlash INTERFACE WITH 16BIT DATA, 11BIT ADDRESS, AND 13BIT CONTROL LINES SCES628A − APRIL 2005 − REVISED APRIL 2005 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) BVD1, BVD2, INPACK, READY, WAIT, and WP have 100-k Ω internal pullup resistors, eliminating the need for external pullups. The resistors are within the tolerance of CF+ and CompactFlash specification revisions 1.4 and 2.0. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. board-optimized pin configuration terminal assignments 12 3 4 5 6 A D12 D04 D03 SD14 SD12 SD11 B D13 D05 D11 SD13 SD10 SD09 C D14 D06 SD15 SINPACK SD08 SD07 D D15 D07 VCC_CF VCC_S SD06 SD05 E CE2 CE1 GND GND SD04 SD03 F OE A10 VCC_CF VCC_S SD02 SD01 G A09 IORD GND GND SD00 SCE1 H A08 IOWR VCC_CF VCC_S EN_L EN_H J A07 WE GND GND MASTER_EN BUF_EN K A06 READY A05 SCE2 SOE SIORD L A04 RESET GND GND SWE SIOWR M A03 WAIT VCC_CF VCC_S SREADY SRESET N A02 INPACK GND GND SWAIT SREG P A01 REG VCC_CF GND SBVD2 SBVD1 R A00 BVD2 VCC_CF VCC_S SA10 SWP T D00 BVD1 VCC_SD DIR(S/CF) SA08 SA09 U D01 D08 CD1 DIR_OUT SA06 SA07 V D02 D09 CD2 SA00 SA04 SA05 W WP D10 SCD SA01 SA02 SA03 GKF PACKAGE (TOP VIEW) J H G F E D C B A 2 13 4 6 5 P N M L K T R U W V |
同様の部品番号 - SN74LV4320AGKFR |
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同様の説明 - SN74LV4320AGKFR |
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