データシートサーチシステム |
|
LM25183-Q1 データシート(PDF) 19 Page - Texas Instruments |
|
|
LM25183-Q1 データシート(HTML) 19 Page - Texas Instruments |
19 / 40 page PS PRI-PK COUT-RMS OUT OUT 2 N I I I 1 3 I ˜ ˜ ˜ ˜ ª º ˜ ˜ ˜ § · ' ˜ ˜ « » ¨ ¸ ˜ ' ˜ © ¹ ˜ ˜ ˜ « » ¬ ¼ 2 2 2 2 OUT D MAG OUT MAG OUT OUT 2 OUT OUT PS IN OUT OUT PS 2 V V L I L I 1 D 1 V 1 D 2 V V N V 2 C V N ˜ ˜ § · § · t ˜ ˜ ¨ ¸ ¨ ¸ ˜ ' ˜ ˜ ˜ © ¹ © ¹ 2 2 2 2 MAG SW-PEAK OUT OUT OUT 12.5 + $ L I 1 D 1 0.7 C 20 ) 2 V V 2 2 120 mV 12 V 2 ˜ ˜ ˜ ˜ DZ(clamp) PS OUT D V 1.5 N V V 1.5 1 12 V 0.4 V 18.6 V DZ(clamp) SW(max) IN(max) V V V t IN(max) D-REV OUT PS V 42 V V V 12 V 54 V N 1 19 LM25183-Q1 www.ti.com SNVSBJ4 – APRIL 2020 Product Folder Links: LM25183-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 8.2.1.2.4 Flyback Diode – DFLY The flyback diode reverse voltage is given by Equation 19. (19) Select a 60-V, 3-A Schottky diode for this application to account for inevitable diode voltage overshoot and ringing related to the resonance of transformer leakage inductance and diode parasitic capacitance. Connect an appropriate RC snubber circuit (for example, 100 Ω and 22 pF) across the flyback diode if needed, particularly if the transformer leakage inductance is high. Also, choose a flyback diode with current rating that aligns with the maximum peak secondary winding current of NPS × ISW-PEAK. 8.2.1.2.5 Leakgae Inductance Clamp Circuit – DF, DCLAMP Connect a diode-Zener clamp circuit across the primary winding to limit the peak switch voltage after MOSFET turnoff below the maximum level of 65 V, as given by Equation 20. (20) Choose a 20-V zener diode for DCLAMP to give a clamp voltage of approximately 1.5 times the reflected output voltage, as specified by Equation 21. This provides a balance between the maximum switch voltage excursion and the leakage inductance demagnetization time. Select a Zener diode with low package parasitic inductance to manage the high slew-rate current during the switch turnoff transition. (21) Choose an ultra-fast switching diode or Schottky diode for DF with reverse voltage rating greater than the maximum input voltage and forward current rating of 2 A or higher. 8.2.1.2.6 Output Capacitor – COUT The output capacitor determines the voltage ripple at the converter output, limits the voltage excursion during a load transient, and sets the dominant pole of the small-signal response of the converter. Select an output capacitance using Equation 22 to limit the ripple voltage amplitude to less than 1% of the output voltage at minimum input voltage and maximum load. (22) Mindful of the voltage coefficient of ceramic capacitors, select three 22-µF, 25-V capacitors in 1210 case size with X7S or better dielectric. Assuming operation in BCM, calculate the capacitive ripple voltage at the output using Equation 23. (23) Equation 24 gives an expression for the output capacitor RMS ripple current. (24) 8.2.1.2.7 Input Capacitor – CIN Select an input capacitance using Equation 25 to limit the ripple voltage amplitude to less than 5% of the input voltage when operating at nominal input voltage. |
同様の部品番号 - LM25183-Q1 |
|
同様の説明 - LM25183-Q1 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |