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LP5910 データシート(PDF) 3 Page - Texas Instruments

部品番号. LP5910
部品情報  LP5910 300-mA Low-Noise, Low-IQ LDO
ダウンロード  35 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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LP5910 Datasheet(HTML) 3 Page - Texas Instruments

 
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6
5
4
OUT
NC
GND
IN
NC
EN
EN
OUT
GND
IN
A2
B2
A1
B1
EN
OUT
GND
IN
A2
B2
A1
B1
3
LP5910
www.ti.com
SNVSA91E – SEPTEMBER 2015 – REVISED JULY 2017
Product Folder Links: LP5910
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
5 Pin Configuration and Functions
YKA Package
4-Pin Ultra-Thin DSBGA
Top View
YKA Package
4-Pin Ultra-Thin DSBGA
Bottom View
DRV Package
6-Pin WSON With Thermal Pad
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
DSBGA
WSON
EN
B1
4
I
Enable input; disables the regulator when logic low. Enables the regulator when logic
high. An internal 1-MΩ pull down resistor connects this input to ground.
GND
B2
5
Common ground
IN
A1
6
I
Voltage supply input. A 1-μF capacitor must be connected at this input.
NC
2, 3
No internal connection. Connect to ground or leave open.
OUT
A2
1
O
Voltage output. A 1-µF low-ESR capacitor must be connected from this pin to the
GND pin. Connect this output to the load circuit.
Exposed Pad
Thermal Pad
The exposed thermal pad on the bottom of the package must be connected to a
copper area under the package on the PCB. Connect to ground potential or leave
floating. Do not connect to any potential other than the same ground potential seen at
device pin 5 (GND). See Power Dissipation for more information.


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