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MSP430F479 データシート(PDF) 52 Page - Texas Instruments |
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MSP430F479 データシート(HTML) 52 Page - Texas Instruments |
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52 / 95 page  52 MSP430F479, MSP430F478, MSP430F477 SLAS629B – MARCH 2009 – REVISED MAY 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430F479 MSP430F478 MSP430F477 Detailed Description Copyright © 2009–2020, Texas Instruments Incorporated 6.9.6 LCD_A Drive With Regulated Charge Pump The LCD_A driver generates the segment and common signals required to drive an LCD display. The LCD_A controller has dedicated data memory to hold segment drive information. Common and segment signals are generated as defined by the mode. Static, 2-MUX, 3-MUX, and 4-MUX LCDs are supported by this peripheral. The module can provide a LCD voltage independent of the supply voltage via an integrated charge pump. Furthermore, it is possible to control the level of the LCD voltage and, thus, contrast in software. 6.9.7 Timer_A3 Timer_A3 is a 16-bit timer or counter with three capture/compare registers. Timer_A3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Table 6-5. Timer_A3 Signal Connections INPUT PIN NUMBER DEVICE INPUT SIGNAL MODULE INPUT NAME MODULE BLOCK MODULE OUTPUT SIGNAL OUTPUT PIN NUMBER PN ZCA OR ZQW PN ZCA OR ZQW P1.5 - 51 F11 TACLK TACLK Timer NA ACLK ACLK SMCLK SMCLK P1.5 - 51 F11 TAINCLK INCLK P1.0 - 58 C11 TA0 CCI0A CCR0 TA0 P1.0 - 58 C11 P1.1 - 57 C12 TA0 CCI0B P1.1 - 57 C12 DVSS GND DVCC VCC P1.2 - 56 D11 TA1 CCI1A CCR1 TA1 P1.2 - 56 D11 CAOUT (internal) CCI1B DVSS GND DVCC VCC P2.0 - 4 C2 TA2 CCI2A CCR2 TA2 P2.0 - 4 C2 ACLK (internal) CCI2B DVSS GND DVCC VCC |
同様の部品番号 - MSP430F479 |
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同様の説明 - MSP430F479 |
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