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MSP430F2619 データシート(PDF) 60 Page - Texas Instruments |
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MSP430F2619 データシート(HTML) 60 Page - Texas Instruments |
60 / 120 page General-Purpose Register Program Counter Stack Pointer Status Register Constant Generator General-Purpose Register General-Purpose Register General-Purpose Register PC/R0 SP/R1 SR/CG1/R2 CG2/R3 R4 R5 R12 R13 General-Purpose Register General-Purpose Register R6 R7 General-Purpose Register General-Purpose Register R8 R9 General-Purpose Register General-Purpose Register R10 R11 General-Purpose Register General-Purpose Register R14 R15 60 MSP430F2619, MSP430F2618, MSP430F2617, MSP430F2616 MSP430F2419, MSP430F2418, MSP430F2417, MSP430F2416 SLAS541L – JUNE 2007 – REVISED MAY 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430F2619 MSP430F2618 MSP430F2617 MSP430F2616 MSP430F2419 MSP430F2418 MSP430F2417 MSP430F2416 Detailed Description Copyright © 2007–2020, Texas Instruments Incorporated 6 Detailed Description 6.1 CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand. The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to- register operation execution time is one cycle of the CPU clock. Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and constant generator respectively. The remaining registers are general-purpose registers (see Figure 6-1). Peripherals are connected to the CPU using data, address, and control buses. Peripherals can be manged with all instructions. Figure 6-1. CPU Registers |
同様の部品番号 - MSP430F2619 |
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同様の説明 - MSP430F2619 |
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