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MSP430F5500IRGZT データシート(PDF) 17 Page - Texas Instruments |
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MSP430F5500IRGZT データシート(HTML) 17 Page - Texas Instruments |
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17 / 125 page  17 MSP430F5510, MSP430F5509, MSP430F5508 MSP430F5507, MSP430F5506, MSP430F5505, MSP430F5504 MSP430F5503, MSP430F5502, MSP430F5501, MSP430F5500 www.ti.com SLAS645L – JULY 2009 – REVISED MAY 2020 Submit Documentation Feedback Product Folder Links: MSP430F5510 MSP430F5509 MSP430F5508 MSP430F5507 MSP430F5506 MSP430F5505 MSP430F5504 MSP430F5503 MSP430F5502 MSP430F5501 MSP430F5500 Terminal Configuration and Functions Copyright © 2009–2020, Texas Instruments Incorporated Table 4-1. Terminal Functions (continued) TERMINAL I/O(1) DESCRIPTION NAME NO. RGC RGZ, PT ZXH, ZQE (3) When this pin is configured as reset, the internal pullup resistor is enabled by default. (4) C6, D4, D5, D6, E3, E4, E5, E6, F3, F4, F5, F6, F7, F8, G3 are reserved and should be connected to ground. V18 55 43 B6 USB regulated power (internal use only, no external current loading) AVSS2 56 44 A5 Analog ground supply P5.2/XT2IN 57 45 B5 I/O General-purpose digital I/O Input terminal for crystal oscillator XT2 P5.3/XT2OUT 58 46 B4 I/O General-purpose digital I/O Output terminal of crystal oscillator XT2 TEST/SBWTCK 59 47 A4 I Test mode pin – select digital I/O on JTAG pins Spy-By-Wire input clock PJ.0/TDO 60 23 C5 I/O General-purpose digital I/O Test data output port PJ.1/TDI/TCLK 61 24 C4 I/O General-purpose digital I/O Test data input Test clock input PJ.2/TMS 62 25 A3 I/O General-purpose digital I/O Test mode select PJ.3/TCK 63 26 B3 I/O General-purpose digital I/O Test clock RST/NMI/SBWTDIO 64 48 A2 I/O Reset input, active low(3) Nonmaskable interrupt input Spy-By-Wire data input/output P6.0/CB0/A0 1 1 A1 I/O General-purpose digital I/O Comparator_B input CB0 (not available on F5507, F5506, F5505, F5504 devices) Analog input A0 – ADC (not available on F5503, F5502, F5501, F5500 devices) P6.1/CB1/A1 2 2 B2 I/O General-purpose digital I/O Comparator_B input CB1 (not available on F5507, F5506, F5505, F5504 devices) Analog input A1 – ADC (not available on F5503, F5502, F5501, F5500 devices) P6.2/CB2/A2 3 3 B1 I/O General-purpose digital I/O Comparator_B input CB2 (not available on F5507, F5506, F5505, F5504 devices) Analog input A2 – ADC (not available on F5503, F5502, F5501, F5500 devices) P6.3/CB3/A3 4 4 C2 I/O General-purpose digital I/O Comparator_B input CB3 (not available on F5507, F5506, F5505, F5504 devices) Analog input A3 – ADC (not available on F5503, F5502, F5501, F5500 devices) Reserved N/A N/A (4) Reserved. Connect to ground. QFN Pad Pad Pad N/A Exposed QFN package pad (not available on PT package devices). TI recommends connecting to VSS. |
同様の部品番号 - MSP430F5500IRGZT |
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同様の説明 - MSP430F5500IRGZT |
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