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TEA2095T データシート(PDF) 11 Page - NXP Semiconductors

部品番号. TEA2095T
部品情報  GreenChip dual synchronous rectifier controller
ダウンロード  19 Pages
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
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TEA2095T Datasheet(HTML) 11 Page - NXP Semiconductors

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NXP Semiconductors
TEA2095T
GreenChip dual synchronous rectifier controller
TEA2095T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1.1 — 10 April 2020
11 / 19
12 Characteristics
Table 7. Characteristics
Tamb = 25 °C; VCC = 12 V; CGDA/CGDB = 10 nF (capacitors between GDA and GND and between GDB and GND). All
voltages are measured with respect to ground (pin 2). Currents are positive when flowing into the IC, unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supply voltage management (pin VCC)
Vstart
start voltage
4.35
4.55
4.75
V
Vstop
stop voltage
4.0
4.2
4.4
V
energy-save
80
90
110
μA
ICC(oper)
operating supply current
normal operation (without gate
charge)
0.7
0.9
1.05
mA
tact(es)
energy save mode activation time
85
110
135
μs
Synchronous rectification sense input (pins DSA, SSA, DSB, and SSB)
Vact(drv)
driver activation voltage
Vsense(S)A/Vsense(S)B = 0 V
−450 −400 −350
mV
Vreg(drv)
driver regulation voltage
Vsense(S)A/Vsense(S)B = 0 V
−33
−25
−20
mV
Vswoff
switch-off voltage
Vsense(S)A/Vsense(S)B = 0 V
60
150
200
mV
td(act)(drv)
driver activation delay time
Vsense(S)A/Vsense(S)B = 0 V;
normal operation;
time from step on VDSA/VDSB (2 V to
−0.5 V) to rising of VGDA/VGDB at 10 %
of end value
-
80
-
ns
td(deact)(drv) driver deactivation delay time
Vsense(S)A/Vsense(S)B = 0 V;
normal operation;
time from step on VDSA/VDSB (−0.5 V
to 2 V) to falling of VGDA/VGDB at 90 %
of begin value
-
40
-
ns
td
delay time
interlock delay time
-
200
-
ns
Gate driver (pins GDA and GDB)
Isource
source current
peak current at VDS = −0.5 V;
VG = 0 V
-
−0.3
-
A
regulation current at VDS = 0 V;
VG = 5 V
-
1
-
A
Isink
sink current
peak current at VDS = 0.25 V;
VG = 5 V
-
2
-
A
Rpd(G)
gate pull-down resistance
VDS = 12 V; IG = 100 mA
2
2.5
3
Ω
VGDA/VGDB at VCC = 5 V
4.98
4.99
5
V
VGDA/VGDB at VCC = 12 V
10.4
10.6
10.8
V
VG(max)
maximum gate voltage
VGDA/VGDB at VCC = 38 V
10.7
11
11.2
V


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