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PCA9450 データシート(PDF) 16 Page - NXP Semiconductors

部品番号 PCA9450
部品情報  Power management IC for i.MX 8M application processor family
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9450 データシート(HTML) 16 Page - NXP Semiconductors

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NXP Semiconductors
PCA9450
Power management IC for i.MX 8M application processor family
PCA9450
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 1.0 — 19 November 2019
16 / 96
Any POK of voltage regulators doesn’t come up within tFLT_SD_PU after regulator is
enabled during power up sequence. It stops power-up sequence and then moves to
FAULT_SD where all regulators are turned off. It stays at FAULT_SD for tFLT_SD_STAY
and transitions to READY state.
3.
Voltage regulator fault in STANDBY and RUN MODE: Move to FAULT_SD mode in
tFLT_SD_WAIT after Fault is detected. Transition to SNVS mode or READY mode from
FAULT_SD mode when fault is removed.
During RUN and STANDBY mode, VR Fault status bit in VRFLT1_STS and
VRFLT2_STS registers is latched to “1” when corresponding regulator voltage falls
below POK threshold for tDEB_POKB, or POK doesn’t go high within tFLT_POK_MSK after
regulator is enabled.
If the fault status bit is masked in VRFLT1_MASK and VRFLT2_MASK registers,
it doesn’t enter FAULT_SD mode. Instead, PCA9450 stays at current mode. If the
fault register bit is unmasked, it starts tFLT_SD_WAIT timer. Application processor can
determine to enter FAULT_SD mode or not, by masking the VR Fault status bit in
VRFLTx_MASK registers before the timer expires. PCA9450 enters FAULT_SD mode
when the timer expires. PCA9450 stays in FAULT_SD mode for tFLT_SD_STAY.
aaa-035711
RUN/STANDBY
Mode
FAULT EVENT
INT
AP receives
INT
Unmask fault register bit or Clear
the status bit when fault is cleared
RUN/STANDBY
RUN/STANDBY
Mode
FAULT EVENT
INT
AP receives
INT
FAULT_SD
tFLT_SD_WAIT starts
tFLT_SD_WAIT starts
AP doesn't take an action until
timer is expired
Figure 10. PCA9450 Fault event
PCA9450 moves to READY mode after FAULT_SD mode if the regulator fault is caused
by LDO1 or LDO2. Otherwise, it moves to SNVS mode after FAULT_SD.
If either LDO1 or LDO2 has fault in SNVS mode, then it enters FAULT_SD mode
regardless of VRFLT1 Mask bit.
PCA9450 doesn’t enter FAULT_SD mode from load switch overcurrent fault.


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