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PCA9450 データシート(PDF) 37 Page - NXP Semiconductors

部品番号 PCA9450
部品情報  Power management IC for i.MX 8M application processor family
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9450 データシート(HTML) 37 Page - NXP Semiconductors

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NXP Semiconductors
PCA9450
Power management IC for i.MX 8M application processor family
PCA9450
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 1.0 — 19 November 2019
37 / 96
8.2.12 0x0C BUCK123_DVS
BUCK1, BUCK2, BUCK3 DVS control register with preset value
Table 32. 0x0C BUCK123_DVS
0x0C – BUCK123_DVS
Reset Type
O
Bit
Name
Type
Reset Description
7
PRESET_EN
R/W
1
BUCK123 output voltage selection
0b = BUCK voltage is determined by each BUCKxOUT_DVS0 or
BUCKxOUT_DVS1.
1b = BUCK voltage is determined by Bx_DVS_PRESET bits.
6:5
B3_DVS_PRESET
R/W
01
BUCK3 (VPU/GPU) Preset voltage option, only for PCA9450A.
00b = 0.8 V
01b = 0.85 V
10b = 0.9 V
11b = 0.95 V
4:3
B1_DVS_PRESET
R/W
01
BUCK1 (SOC) Preset voltage option
00b = 0.8 V
01b = 0.85 V
10b = 0.9 V
11b = 0.95 V
2:0
B2_DVS_PRESET
R/W
001
BUCK2 (ARM) Preset voltage option
000b = 0.8 V
001b = 0.85 V
010b = 0.9 V
011b = 0.95 V
100b – 111b = 1.0 V
8.2.13 0x0D BUCK1OUT_LIMIT
BUCK1 output voltage limit register
Table 33. 0x0D BUCK1OUT_LIMIT
0x0D – BUCK1OUT_LIMIT
Reset Type
O
Bit
Name
Type
Reset Description
7
RSVD
R/W
0
Reserved
6:0
B1_LIMIT
R/W
001
1100
BUCK1 output voltage limit
Programmable from 0.60 V to 2.1875 V in 12.5 mV step
Default = 0.95 V
8.2.14 0x0E BUCK2OUT_LIMIT
BUCK2 output voltage limit register
Table 34. 0x0E BUCK2OUT_LIMIT
0x0E – BUCK2OUT_LIMIT
Reset Type
O
Bit
Name
Type
Reset Description
7
RSVD
R/W
0
Reserved


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