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IMX8MNCEC データシート(PDF) 64 Page - NXP Semiconductors

部品番号 IMX8MNCEC
部品情報  i.MX 8M Nano Applications Processor Datasheet for Consumer Products
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
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i.MX 8M Nano Applications Processor Datasheet for Consumer Products, Rev. 0.1, 03/2020
64
NXP Semiconductors
Electrical characteristics
Figure 42. SAI Timing — Slave Modes
3.9.11
SPDIF timing parameters
The Sony/Philips Digital Interconnect Format (SPDIF) data is sent using the bi-phase marking code. When
encoding, the SPDIF data signal is modulated by a clock that is twice the bit rate of the data signal.
Table 57 and Figure 43 and Figure 44 show SPDIF timing parameters for the Sony/Philips Digital
Interconnect Format (SPDIF), including the timing of the modulating Rx clock (SPDIF_SR_CLK) for
SPDIF in Rx mode and the timing of the modulating Tx clock (SPDIF_ST_CLK) for SPDIF in Tx mode.
Table 57. SPDIF timing parameters
Parameter
Symbol
Timing Parameter Range
Unit
Min
Max
SPDIF_IN Skew: asynchronous inputs, no specs apply
0.7
ns
SPDIF_OUT output (Load = 50 pf)
• Skew
• Transition rising
• Transition falling
1.5
24.2
31.3
ns
SPDIF_OUT output (Load = 30 pf)
• Skew
• Transition rising
• Transition falling
1.5
13.6
18.0
ns
Modulating Rx clock (SPDIF_SR_CLK) period
srckp
40.0
ns
SPDIF_SR_CLK high period
srckph
16.0
ns
SPDIF_SR_CLK low period
srckpl
16.0
ns
Modulating Tx clock (SPDIF_ST_CLK) period
stclkp
40.0
ns
SPDIF_ST_CLK high period
stclkph
16.0
ns
SPDIF_ST_CLK low period
stclkpl
16.0
ns


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