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SN74HCS164 データシート(PDF) 15 Page - Texas Instruments

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部品番号. SN74HCS164
部品情報  SN74HCS164 8-Bit Parallel-Out Serial Shift Registers With Schmitt-Trigger Inputs
ダウンロード  24 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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SN74HCS164 Datasheet(HTML) 15 Page - Texas Instruments

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10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power
disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps
to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The
bypass capacitor should be installed as close to the power terminal as possible for best results, as shown in
given example layout image.
11 Layout
11.1 Layout Guidelines
When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many
cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a
triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left
unconnected because the undefined voltages at the outside connections result in undefined operational states.
All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the
input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular
unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever
makes more sense for the logic function or is more convenient.
11.2 Layout Example
1
2
3
4
5
6
7
14
13
12
11
10
Q
C
Q
E
Q
F
Q
G
GND
V
CC
Q
A
A
CLK
CLR
GND
V
CC
B
Q
B
Q
D
0.1 F
Bypass capacitor
placed close to
the device
Avoid 90°
corners for
signal lines
Recommend GND flood fill for
improved signal isolation, noise
reduction, and thermal dissipation
Unused output
left floating
Unused inputs tie to GND or VCC
Q
H
8
9
Figure 11-1. Example layout for the SN74HCS164
www.ti.com
SN74HCS164
SCLS827 – AUGUST 2020
Copyright © 2020 Texas Instruments Incorporated
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