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L64733 データシート(PDF) 11 Page - LSI Computer Systems |
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L64733 データシート(HTML) 11 Page - LSI Computer Systems |
11 / 48 page L64733/L64734 Tuner and Satellite Receiver Chipset 11 INSEL RF Port Input Select Input When the INSEL signal is asserted, the L64733 is in normal mode. When the INSEL signal is deasserted, the L64733 is in Loop-Through mode. In this mode, the RFIN signal is looped through to the RFOUT signal, and the L64733 local oscillator is shut off. MODn, MODp Prescaler Modulus Input The MOD differential signals form a PECL input that sets the prescaler modulus. When the MODp signal is positive with respect to the MODn signal, the prescaler modulus is set to 32 (divide by 32). When the MODn signal is positive with respect to the MODp signal, the prescaler modulus is set to 33 (divide by 33). PLLINn, PLLINp Phase Detector Input The PLLIN differential signals form the phase detector input and are connected to the L64734 PLLINp and PLLINn output signals. See the L64734 PLLINp and PLLINn descriptions in the subsection entitled “Synthesizer Control Interface” on page 19. QDCn, QDCp Q-Channel DC Offset Correction Input Connect a 0.1 µF (or larger) capacitor between the QDCp and QDCn signals. Channel Data Signals This section describes the channel data signals from the L64733 to the L64734. IOUTn, IOUTp I-Channel Baseband Data Output The IOUT differential signals form the in-phase data provided to the L64734. QOUTn, QOUTp Q-Channel Baseband Data Output The QOUT differential signals form the quadrature-phase data provided to the L64734. |
同様の部品番号 - L64733 |
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同様の説明 - L64733 |
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