Silicom Ltd. Connectivity Solutions

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Figure 3: Content Aware Filtering NIC Functional Block Diagram

Figure 3 illustrates functional block diagram of content aware TAP:

Packets received in port A and meet rule, direct to port B. Packets received in port A and do not meet rule are dropped.

Packets received in port C and meet rule, direct to port D. Packets received in port C and do not meet rule are Dropt.

Director

– Load balancing

Silicom’s 10 Gigabit Ethernet content aware director provides a load balancing of the traffic coming from the 4 x 10G external ports

(0,2,4 and 6). The traffic is balanced, based on a defined hash configuration (5 tuple or other), to the 4x 10G internal interfaces (

1,3,5 and 7)that are going to the host.

Figure 4: Load Balancing Functional Block Diagram

Figure 4 illustrates functional block diagram of Load Balancing:

Packets received in the 4 x 10G external ports (0,2,4 and 6) to be balanced based on a defined hash configuration (5 tuple or

other), to the 4x 10G internal interfaces (1,3,5and 7) that are going to the host. If there is external port that is heavily loaded the

traffic will go into the 4 internal interfaces with balanced load. An ISL tag is added to all incoming packets , it enable the host to

know the source port, packest that are sent back from the host are striedp from the ISL tag.