TMS320F28335_V02 datasheet(85/208 Pages) TI

部品番号	TMS320F28335

部品情報	TMS320F2833x, TMS320F2823x Digital Signal Controllers (DSCs)

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tsu(XD)XRD

Lead

Active

Trail

DIN

td(XCOH-XZCSL)

td(XCOH-XA)

td(XCOHL-XRDL)

td(XCOHL-XZCSH)

td(XCOHL-XRDH)

WS (Async)

XCLKOUT = XTIMCLK

XCLKOUT = 1/2 XTIMCLK

XZCS0, XZCS6, XZCS7

XA[0:19]

XRD

XWE0, XWE1(D)

XR/W

XD[0:31], XD[0:15]

XREADY(Asynch)

tsu(XRDYasynchL)XCOHL

ta(XRD)

ta(A)

th(XRDYasynchL)

th(XD)XRD

th(XRDYasynchH)XZCSH

= Don’t care. Signal can be high or low during this time.

Legend:

(A) (B)

(C)

tsu(XRDYasynchH)XCOHL

(E)

(F)

te(XRDYasynchH)

85

TMS320F28335, TMS320F28334, TMS320F28333, TMS320F28332

TMS320F28235, TMS320F28234, TMS320F28232

www.ti.com

SPRS439O – JUNE 2007 – REVISED APRIL 2019

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Product Folder Links: TMS320F28335 TMS320F28334 TMS320F28333 TMS320F28332 TMS320F28235

TMS320F28234 TMS320F28232

Specifications

(1)

N/A = “Don’t care” for this example

A.

All XINTF accesses (lead period) begin on the rising edge of XCLKOUT. When necessary, the device will insert an

alignment cycle before an access to meet this requirement.

B.

During alignment cycles, all signals will transition to their inactive state.

C.

During inactive cycles, the XINTF address bus will always hold the last address put out on the bus except XA0, which

remains high. This includes alignment cycles.

D.

XWE1 is valid only in 32-bit data bus mode. In 16-bit mode, this signal is XA0.

E.

For

each

sample,

setup

time

from

the

beginning

of

the

access

can

be

calculated

as:

E = (XRDLEAD + XRDACTIVE -3 +n) tc(XTIM) – tsu(XRDYasynchL)XCOHL where n is the sample number: n = 1, 2, 3, and

so forth.

F.

Reference for the first sample is with respect to this point: F = (XRDLEAD + XRDACTIVE –2) tc(XTIM)

Figure 5-32. Example Read With Asynchronous XREADY Access

XTIMING register parameters used for this example:

XRDLEAD

XRDACTIVE

XRDTRAIL

USEREADY

X2TIMING

XWRLEAD

XWRACTIVE

XWRTRAIL

READYMODE

≥ 1

3

≥ 1

1

0

N/A(1)

1 = XREADY

(Async)

同様の部品番号 - TMS320F28335_V02

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Texas Instruments	TMS320F28335	5Mb / 208P	[Old version datasheet] TMS320F2833x, TMS320F2823x Digital Signal Controllers (DSCs)

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