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TMS320F28379S データシート(PDF) 72 Page - Texas Instruments

部品番号 TMS320F28379S
部品情報  TMS320F2837xS Microcontrollers
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

TMS320F28379S データシート(HTML) 72 Page - Texas Instruments

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TMS
TDI
TDO
PD
RTCK
TCK
EMU0
TRST
TDIS
GND
KEY
GND
GND
EMU1
GND
TCK
TDO
TDI
TMS
TRST
GND
1
2
3
4
5
6
7
8
9
10
11
12
14
13
3.3 V
3.3 V
100 W
2.2 kW
4.7 kW
4.7 kW
3.3 V
Distance between the header and the target
should be less than 6 inches (15.24 cm).
MCU
72
TMS320F28379S, TMS320F28378S, TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881I – AUGUST 2014 – REVISED JUNE 2020
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28378S TMS320F28377S TMS320F28376S TMS320F28375S
TMS320F28374S
Specifications
Copyright © 2014–2020, Texas Instruments Incorporated
5.9.5
Emulation/JTAG
The JTAG port has five dedicated pins: TRST, TMS, TDI, TDO, and TCK. The TRST signal should always
be pulled down through a 2.2-kΩ pulldown resistor on the board. This MCU does not support the EMU0
and EMU1 signals that are present on 14-pin and 20-pin emulation headers. These signals should always
be pulled up at the emulation header through a pair of board pullup resistors ranging from 2.2 kΩ to
4.7 kΩ (depending on the drive strength of the debugger ports). Typically, a 2.2-kΩ value is used.
See Figure 5-9 to see how the 14-pin JTAG header connects to the MCU’s JTAG port signals. Figure 5-10
shows how to connect to the 20-pin header. The 20-pin JTAG header terminals EMU2, EMU3, and EMU4
are not used and should be grounded.
The PD (Power Detect) terminal of the JTAG debug probe header should be connected to the board 3.3-V
supply. Header GND terminals should be connected to board ground. TDIS (Cable Disconnect Sense)
should also be connected to board ground. The JTAG clock should be looped from the header TCK output
terminal back to the RTCK input terminal of the header (to sense clock continuity by the JTAG debug
probe). Header terminal RESET is an open-drain output from the JTAG debug probe header that enables
board components to be reset through JTAG debug probe commands (available only through the 20-pin
header).
Typically, no buffers are needed on the JTAG signals when the distance between the MCU target and the
JTAG header is smaller than 6 inches (15.24 cm), and no other devices are present on the JTAG chain.
Otherwise, each signal should be buffered. Additionally, for most JTAG debug probe operations at
10 MHz, no series resistors are needed on the JTAG signals. However, if high emulation speeds are
expected (35 MHz or so), 22-Ω resistors should be placed in series on each JTAG signal.
For more information about hardware breakpoints and watchpoints, see Hardware Breakpoints and
Watchpoints for C28x in CCS.
For more information about JTAG emulation, see the XDS Target Connection Guide.
Figure 5-9. Connecting to the 14-Pin JTAG Header


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