ArrayC Series

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APPENDIX C - EXAMPLE OF USING THE SUMMED BREAKOUT BOARD

The Figure 15 shows the ARRAYX-BOB6-64S set up for readout of all of the pixels summed together.

Figure 15. Example of an ARRAYC-60035-64P connected to an ARRAYX-BOB6-64S for the summed

readout of all of the pixels (left), with simplified readout schematic (right).

−ve bias

0 V

50 W

10 nF

SMA 1 is used for supplying Vbias and SMA2 for reading

out the summed standard output from all pixels in the

ARRAYC-60035-64P.

To bias the array, the inner (“I”) of SMA1 is connected to

the SM (summed anode) pin on the same header, via a load

resistor of 50

W. The cathode is also common to all pixels and

is connected via a “CM” pin to the outer (“O”) of SMA1.

Vbias is then applied to SMA1, which for an ArrayC has a

negative polarity with respect to the common.

To access the summed standard output, the second SM

header pin is then connected to the inner (“I”) of SMA2 via

a decoupling capacitor of 10 nF. The outer (“O”) of SMA2

is again connected to the common cathode (“CM”). The

summed signal is then available from SMA2.