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データシートサーチシステム |
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データシートサーチシステム |
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SN74ALVTH16501DGG データシート(PDF) 7 Page - Texas Instruments |
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SN74ALVTH16501DGG データシート(HTML) 7 Page - Texas Instruments |
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7 / 11 page  SN54ALVTH16501, SN74ALVTH16501 2.5-V/3.3-V 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES071D – JUNE 1996 – REVISED JANUARY 1999 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) SN54ALVTH16501 SN74ALVTH16501 UNIT MIN MAX MIN MAX UNIT fclock Clock frequency MHz t Pulse duration LE high ns tw Pulse duration CLK high or low ns A or B before CLK ↑ Data high t Setup time A or B before CLK ↑ Data low ns tsu Setup time A or B before LE ↓ CLK high ns A or B before LE ↓ CLK low A or B after CLK ↑ Data high th Hold time A or B after CLK ↑ Data low ns th Hold time A or B after LE ↓ CLK high ns A or B after LE ↓ CLK low timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2) SN54ALVTH16501 SN74ALVTH16501 UNIT MIN MAX MIN MAX UNIT fclock Clock frequency MHz t Pulse duration LE high ns tw Pulse duration CLK high or low ns A or B before CLK ↑ Data high t Setup time A or B before CLK ↑ Data low ns tsu Setup time A or B before LE ↓ CLK high ns A or B before LE ↓ CLK low A or B after CLK ↑ Data high th Hold time A or B after CLK ↑ Data low ns th Hold time A or B after LE ↓ CLK high ns A or B after LE ↓ CLK low |
同様の部品番号 - SN74ALVTH16501DGG |
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同様の説明 - SN74ALVTH16501DGG |
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